跳至主導覽
跳至搜尋
跳過主要內容
國立陽明交通大學研發優勢分析平台 首頁
English
中文
首頁
人員
單位
研究成果
計畫
獎項
活動
貴重儀器
影響
按專業知識、姓名或所屬機構搜尋
Double snapback characteristics in high-voltage nMOSFETs and the impact to on-chip ESD protection design
Ming-Dou Ker
*
, Kun Hsien Lin
*
此作品的通信作者
研究成果
:
Article
›
同行評審
38
引文 斯高帕斯(Scopus)
總覽
指紋
指紋
深入研究「Double snapback characteristics in high-voltage nMOSFETs and the impact to on-chip ESD protection design」主題。共同形成了獨特的指紋。
排序方式
重量
按字母排序
Engineering
Supply Voltage
100%
Power Supply
100%
Electric Lines
100%
Electrostatic Discharge
100%
Power Rail
100%
Holding Voltage
100%
Real System
100%
Keyphrases
NMOSFET
100%
On-chip ESD Protection
100%
Double Snapback
100%
Supply Voltage
16%
Electrostatic Discharge
16%
System Application
16%
Latch-up
16%
Power Rail
16%
Physical Mechanism
16%
Clamp Circuit
16%
Device Simulation
16%
Transmission Line Pulsing
16%
CMOS IC
16%
Snapback Effect
16%
Holding Voltage
16%
High-voltage CMOS
16%
Real System
16%
Snapback
16%
Physics
Electrostatics
100%
Transmission Line
100%
Earth and Planetary Sciences
Electric Lines
100%
Electrostatic Force
100%