Dopant redistribution in dual gate W-polycide CMOS and its improvement by RTA

H. Hayashida*, Y. Toyoshima, Y. Suizu, K. Mitsuhashi, H. Iwai, K. Maeguchi

*此作品的通信作者

研究成果: Conference article同行評審

24 引文 斯高帕斯(Scopus)

摘要

Impurity redistribution and interdiffusion in the dual-gate (n+/P+ polycide) structures for symmetric CMOS were investigated in detail. It was found that high-temperature rapid thermal anneal (RTA) is very effective in suppressing the redistribution and interdiffusion in the polycide gate. The suppression mechanism was investigated by two-dimensional SIMS (secondary ion mass spectrometry) measurements. In the RTA case, it is possible to keep high boron concentration in the gate poly Si, because boron absorption into the silicide is suppressed significantly. Even in the 800°C furnace annealing and RTA (1050°C) cases, it was found that arsenic atoms diffuse in the silicide layer at least 30 μm from the n+ region into the p+ region, although the amount was not as large as for the 900°C furnace annealing case. Performance improvement for the RTA process was verified by using 0.5-μm symmetric CMOS ring oscillators.

原文English
頁(從 - 到)29-30
頁數2
期刊Digest of Technical Papers - Symposium on VLSI Technology
出版狀態Published - 1989
事件Ninth Symposium on VLSI Technology 1989 - Digest of Technical Papers - Kyoto, Jpn
持續時間: 22 5月 198925 5月 1989

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