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Digital Buck Converter with Switching Loss Reduction Scheme for Light Load Efficiency Enhancement
Chung Shiang Wu, Hui Hsuan Lee,
Po-Hung Chen
, Wei Hwang
電子研究所
研究成果
:
Article
›
同行評審
3
引文 斯高帕斯(Scopus)
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Keyphrases
Output Current
100%
Efficiency Enhancement
100%
Buck Converter
100%
Switching Loss Reduction
100%
Reduction Strategies
100%
Light Load Efficiency
100%
Conversion Efficiency
66%
Duty Ratio
66%
Voltage Swing
66%
Light Load Condition
66%
Continuous Conduction Mode
66%
Power Stage
66%
Efficiency Improvement
33%
Controller
33%
Modulated Signal
33%
Current Range
33%
Output Voltage
33%
Transistor
33%
Ratio Estimation
33%
Estimation Scheme
33%
Voltage Scaling
33%
Peak Efficiency
33%
Width Scaling
33%
Inductor Current Ripple
33%
Dynamic Power Dissipation
33%
Digital Pulse Width Modulation
33%
Engineering
Current Output
100%
Switching Loss
100%
Buck Converter
100%
Light Load
100%
Loss Reduction
100%
Conversion Efficiency
66%
Load Condition
66%
Duty Ratio
66%
Power Stage
66%
Experimental Result
33%
Signal Modulation
33%
Output Voltage
33%
Mode Operation
33%
Voltage Scaling
33%
Peak Efficiency
33%
Dynamic Power Dissipation
33%