Device optimization for 200V GaN-on-SOI Platform for Monolithicly Integrated Power Circuits

Olga Syshchyk, Thibault Cosnier, Zheng Hong Huang, Deepthi Cingu, Dirk Wellekens, Anurag Vohra, Karen Geens, Pavan Vudumula, Urmimala Chatterjee, Stefaan Decoutere, Tian Li Wu, Benoit Bakeroot

研究成果: Conference contribution同行評審

2 引文 斯高帕斯(Scopus)

摘要

The device performance of monolithically integrated power Schottky barrier diodes (SBDs) and depletion-mode (D-mode) MIS HEMTs is studied in relation to the thickness of the gate dielectric, the gate-edge termination (GET) layer and AlGaN barrier. Special attention is paid to the turn-on voltage (VTON), ON-resistance (RON), device dispersion, leakage current and breakdown voltage (VBD) of SBDs and D-mode MIS-HEMTs. Based on the current design, SBDs show the lowest dynamic RON for devices with 7.5-9.5 nm AlGaN barrier thickness and 25-35 nm GET thicknesses. The best performance of the D-mode MIS-HEMTs is observed for devices with 5.5 nm AlGaN barrier thickness and 45 nm gate dielectric thickness.

原文English
主出版物標題ESSDERC 2022 - IEEE 52nd European Solid-State Device Research Conference, Proceedings
發行者Editions Frontieres
頁面245-248
頁數4
ISBN(電子)9781665484978
DOIs
出版狀態Published - 2022
事件52nd IEEE European Solid-State Device Research Conference, ESSDERC 2022 - Virtual, Online, Italy
持續時間: 19 9月 202222 9月 2022

出版系列

名字European Solid-State Device Research Conference
2022-September
ISSN(列印)1930-8876

Conference

Conference52nd IEEE European Solid-State Device Research Conference, ESSDERC 2022
國家/地區Italy
城市Virtual, Online
期間19/09/2222/09/22

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