Device isolation process for 4H-SiC CMOS ICs

Bing Yue Tsui; Ya Ru Jhuang; Jian Hao Lin; Yi Ting Huang; Te Kai Tsai; Kai Ti Hsu; Yi Han Su; Yong Fen Hsieh

doi:10.1109/EDTM53872.2022.9798380

Device isolation process for 4H-SiC CMOS ICs

Bing Yue Tsui^*, Ya Ru Jhuang, Jian Hao Lin, Yi Ting Huang, Te Kai Tsai, Kai Ti Hsu, Yi Han Su, Yong Fen Hsieh

^*此作品的通信作者

電子研究所

研究成果: Conference contribution › 同行評審

摘要

SiC CMOS ICs attract more and more attention recently. Semi-recessed isolation is one of the key processes for sub-micron ICs. In this paper, LOCal Oxidation of SiC (LOCOSiC) process is reviewed. The growth process and shape control of the field oxide are discussed. The influence of LOCOSiC isolation on gate oxide reliability, junction leakage current, and isolation capability are also presented.

原文	English
主出版物標題	6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	238-240
頁數	3
ISBN（電子）	9781665421775
DOIs	https://doi.org/10.1109/EDTM53872.2022.9798380
出版狀態	Published - 2022
事件	6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022 - Virtual, Online, Japan 持續時間: 6 3月 2022 → 9 3月 2022

出版系列

名字	6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022

Conference

Conference	6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022
國家/地區	Japan
城市	Virtual, Online
期間	6/03/22 → 9/03/22

存取文件

10.1109/EDTM53872.2022.9798380

其它文件與鏈接

Link to publication in Scopus

引用此

Tsui, B. Y., Jhuang, Y. R., Lin, J. H., Huang, Y. T., Tsai, T. K., Hsu, K. T., Su, Y. H., & Hsieh, Y. F. (2022). Device isolation process for 4H-SiC CMOS ICs. 於 6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022 (頁 238-240). (6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDTM53872.2022.9798380

@inproceedings{5d4edf8adb90434cab78dc0ba9eb956f,

title = "Device isolation process for 4H-SiC CMOS ICs",

abstract = "SiC CMOS ICs attract more and more attention recently. Semi-recessed isolation is one of the key processes for sub-micron ICs. In this paper, LOCal Oxidation of SiC (LOCOSiC) process is reviewed. The growth process and shape control of the field oxide are discussed. The influence of LOCOSiC isolation on gate oxide reliability, junction leakage current, and isolation capability are also presented.",

keywords = "CMOS, ICs and Isolation, SiC",

author = "Tsui, {Bing Yue} and Jhuang, {Ya Ru} and Lin, {Jian Hao} and Huang, {Yi Ting} and Tsai, {Te Kai} and Hsu, {Kai Ti} and Su, {Yi Han} and Hsieh, {Yong Fen}",

note = "Publisher Copyright: {\textcopyright} 2022 IEEE.; 6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022 ; Conference date: 06-03-2022 Through 09-03-2022",

year = "2022",

doi = "10.1109/EDTM53872.2022.9798380",

language = "English",

series = "6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "238--240",

booktitle = "6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022",

address = "United States",

}

Tsui, BY, Jhuang, YR, Lin, JH, Huang, YT, Tsai, TK, Hsu, KT, Su, YH & Hsieh, YF 2022, Device isolation process for 4H-SiC CMOS ICs. 於 6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022. 6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022, Institute of Electrical and Electronics Engineers Inc., 頁 238-240, 6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022, Virtual, Online, Japan, 6/03/22. https://doi.org/10.1109/EDTM53872.2022.9798380

Device isolation process for 4H-SiC CMOS ICs. / Tsui, Bing Yue; Jhuang, Ya Ru; Lin, Jian Hao 等.
6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022. Institute of Electrical and Electronics Engineers Inc., 2022. p. 238-240 (6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022).

研究成果: Conference contribution › 同行評審

TY - GEN

T1 - Device isolation process for 4H-SiC CMOS ICs

AU - Tsui, Bing Yue

AU - Jhuang, Ya Ru

AU - Lin, Jian Hao

AU - Huang, Yi Ting

AU - Tsai, Te Kai

AU - Hsu, Kai Ti

AU - Su, Yi Han

AU - Hsieh, Yong Fen

PY - 2022

Y1 - 2022

N2 - SiC CMOS ICs attract more and more attention recently. Semi-recessed isolation is one of the key processes for sub-micron ICs. In this paper, LOCal Oxidation of SiC (LOCOSiC) process is reviewed. The growth process and shape control of the field oxide are discussed. The influence of LOCOSiC isolation on gate oxide reliability, junction leakage current, and isolation capability are also presented.

AB - SiC CMOS ICs attract more and more attention recently. Semi-recessed isolation is one of the key processes for sub-micron ICs. In this paper, LOCal Oxidation of SiC (LOCOSiC) process is reviewed. The growth process and shape control of the field oxide are discussed. The influence of LOCOSiC isolation on gate oxide reliability, junction leakage current, and isolation capability are also presented.

KW - CMOS

KW - ICs and Isolation

KW - SiC

UR - http://www.scopus.com/inward/record.url?scp=85133977350&partnerID=8YFLogxK

U2 - 10.1109/EDTM53872.2022.9798380

DO - 10.1109/EDTM53872.2022.9798380

M3 - Conference contribution

AN - SCOPUS:85133977350

T3 - 6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022

SP - 238

EP - 240

BT - 6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022

Y2 - 6 March 2022 through 9 March 2022

ER -

Tsui BY, Jhuang YR, Lin JH, Huang YT, Tsai TK, Hsu KT 等. Device isolation process for 4H-SiC CMOS ICs. 於 6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022. Institute of Electrical and Electronics Engineers Inc. 2022. p. 238-240. (6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022). doi: 10.1109/EDTM53872.2022.9798380

Device isolation process for 4H-SiC CMOS ICs

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