Device isolation process for 4H-SiC CMOS ICs

Bing Yue Tsui*, Ya Ru Jhuang, Jian Hao Lin, Yi Ting Huang, Te Kai Tsai, Kai Ti Hsu, Yi Han Su, Yong Fen Hsieh

*此作品的通信作者

研究成果: Conference contribution同行評審

2 引文 斯高帕斯(Scopus)

摘要

SiC CMOS ICs attract more and more attention recently. Semi-recessed isolation is one of the key processes for sub-micron ICs. In this paper, LOCal Oxidation of SiC (LOCOSiC) process is reviewed. The growth process and shape control of the field oxide are discussed. The influence of LOCOSiC isolation on gate oxide reliability, junction leakage current, and isolation capability are also presented.

原文English
主出版物標題6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022
發行者Institute of Electrical and Electronics Engineers Inc.
頁面238-240
頁數3
ISBN(電子)9781665421775
DOIs
出版狀態Published - 2022
事件6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022 - Virtual, Online, Japan
持續時間: 6 3月 20229 3月 2022

出版系列

名字6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022

Conference

Conference6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022
國家/地區Japan
城市Virtual, Online
期間6/03/229/03/22

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