Design optimization of a current mirror amplifier integrated circuit using a computational statistics technique

Keyphrases

• Integrated Circuits 100%
• Design Optimization 100%
• Current Mirror Circuit 100%
• Computational Statistics 100%
• Slew Rate 33%
• Cut-off Frequency 33%
• Transistor 33%
• CMOS Devices 33%
• Phase Margin 33%
• Voltage Gain 33%
• Common-mode Rejection Ratio 33%
• Central Composite Design 33%
• Residual Plot 33%
• Second-order Reaction 33%
• Response Surface Model 33%
• Circuit Simulation Software 33%

Engineering

• Amplifier 100%
• Current Mirror 100%
• Design Optimization 100%
• Integrated Circuit 100%
• Slew Rate 33%
• Design Method 33%
• Circuit Simulation 33%
• Cutoff Frequency 33%
• Common Mode 33%
• Phase Margin 33%
• Central Composite Design 33%
• Simulation Software 33%
• Surface Model 33%
• Response Surface 33%