Design on the turn-on efficient power-rail ESD clamp circuit with stacked polysilicon diodes

Ming-Dou Ker; T. Y. Chen

doi:10.1109/ISCAS.2001.922348

Design on the turn-on efficient power-rail ESD clamp circuit with stacked polysilicon diodes

Ming-Dou Ker^*, T. Y. Chen

^*此作品的通信作者

研究成果: Conference article › 同行評審

3 引文斯高帕斯（Scopus）

摘要

A novel power-rail ESD clamp circuit design by using stacked polysilicon diodes to trigger ESD protection device is proposed to achieve excellent on-chip ESD protection. Design methodology of this novel ESD clamp circuit has been derived in detail. Some controlled factors in the novel ESD clamp circuit can be exactly calculated to design a suitable ESD clamp circuit for different power supply applications. By adding this efficient power-rail ESD clamp circuit, the HBM ESD level of a CMOS IC product has been successfully improved from the original ∼200V to become ≥ 3kV.

原文	English
期刊	Materials Research Society Symposium - Proceedings
卷	626
DOIs	https://doi.org/10.1109/ISCAS.2001.922348
出版狀態	Published - 1 1月 2001
事件	Thermoelectric Materials 2000-The Next Generation Materials for Small-Scale Refrigeration and Power Generation Applications - San Francisco, CA, United States 持續時間: 24 4月 2000 → 27 4月 2000

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10.1109/ISCAS.2001.922348

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abstract = "A novel power-rail ESD clamp circuit design by using stacked polysilicon diodes to trigger ESD protection device is proposed to achieve excellent on-chip ESD protection. Design methodology of this novel ESD clamp circuit has been derived in detail. Some controlled factors in the novel ESD clamp circuit can be exactly calculated to design a suitable ESD clamp circuit for different power supply applications. By adding this efficient power-rail ESD clamp circuit, the HBM ESD level of a CMOS IC product has been successfully improved from the original ∼200V to become ≥ 3kV.",

author = "Ming-Dou Ker and Chen, {T. Y.}",

year = "2001",

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doi = "10.1109/ISCAS.2001.922348",

language = "English",

volume = "626",

journal = "Materials Research Society Symposium - Proceedings",

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AU - Ker, Ming-Dou

AU - Chen, T. Y.

PY - 2001/1/1

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N2 - A novel power-rail ESD clamp circuit design by using stacked polysilicon diodes to trigger ESD protection device is proposed to achieve excellent on-chip ESD protection. Design methodology of this novel ESD clamp circuit has been derived in detail. Some controlled factors in the novel ESD clamp circuit can be exactly calculated to design a suitable ESD clamp circuit for different power supply applications. By adding this efficient power-rail ESD clamp circuit, the HBM ESD level of a CMOS IC product has been successfully improved from the original ∼200V to become ≥ 3kV.

AB - A novel power-rail ESD clamp circuit design by using stacked polysilicon diodes to trigger ESD protection device is proposed to achieve excellent on-chip ESD protection. Design methodology of this novel ESD clamp circuit has been derived in detail. Some controlled factors in the novel ESD clamp circuit can be exactly calculated to design a suitable ESD clamp circuit for different power supply applications. By adding this efficient power-rail ESD clamp circuit, the HBM ESD level of a CMOS IC product has been successfully improved from the original ∼200V to become ≥ 3kV.

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U2 - 10.1109/ISCAS.2001.922348

DO - 10.1109/ISCAS.2001.922348

M3 - Conference article

AN - SCOPUS:0035025865

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VL - 626

JO - Materials Research Society Symposium - Proceedings

JF - Materials Research Society Symposium - Proceedings

T2 - Thermoelectric Materials 2000-The Next Generation Materials for Small-Scale Refrigeration and Power Generation Applications

Y2 - 24 April 2000 through 27 April 2000

ER -

Design on the turn-on efficient power-rail ESD clamp circuit with stacked polysilicon diodes

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