Design of one-dimensional systolic-array systems for linear state equations

Keyphrases

• Array System 100%
• Systolic Array 100%
• Linear Equation of State 100%
• Linear Systolic Array 50%
• Two Dimensional 16%
• Computation Time 16%
• Input-output 16%
• Three-dimensional (3D) 16%
• Chip Area 16%
• First-in-first-out 16%
• Partitioning Scheme 16%
• One-dimensional Array 16%
• Dependence Graph 16%
• Content-addressable Memory 16%
• Control Bits 16%
• Dimensional Dependence 16%
• Double Projections 16%

Engineering

• Systolic Arrays 100%
• One Dimensional 100%
• Linear State Equation 100%
• Two Dimensional 16%
• Chip Area 16%
• Computation Time 16%
• Dimensional Array 16%