TY - GEN
T1 - Design of on-chip power-rail ESD clamp circuit with ultra-small capacitance to detect ESD transition
AU - Chen, Shih Hung
AU - Ker, Ming-Dou
PY - 2009/12/1
Y1 - 2009/12/1
N2 - A power-rail ESD clamp circuit with a new proposed ESD-transient detection circuit which adopts a ultra small capacitor to achieve the required functions has been presented and substantiated to own a long turn-on duration and high turn-on efficiency. In addition, the power-rail ESD clamp circuits with the new proposed ESD-transient detection circuit also presented an excellent immunity against the mis-trigger and the latch-on event under the fast power-on condition.
AB - A power-rail ESD clamp circuit with a new proposed ESD-transient detection circuit which adopts a ultra small capacitor to achieve the required functions has been presented and substantiated to own a long turn-on duration and high turn-on efficiency. In addition, the power-rail ESD clamp circuits with the new proposed ESD-transient detection circuit also presented an excellent immunity against the mis-trigger and the latch-on event under the fast power-on condition.
UR - http://www.scopus.com/inward/record.url?scp=77950670378&partnerID=8YFLogxK
U2 - 10.1109/VDAT.2009.5158161
DO - 10.1109/VDAT.2009.5158161
M3 - Conference contribution
AN - SCOPUS:77950670378
SN - 9781424427826
T3 - 2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09
SP - 327
EP - 330
BT - 2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09
T2 - 2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09
Y2 - 28 April 2009 through 30 April 2009
ER -