Design of negative charge pump circuit with polysilicon diodes in a 0.25 μm CMOS process

Ming-Dou Ker, Chyh Yih Chang, Hsin Chin Jiang

    研究成果: Conference contribution同行評審

    16 引文 斯高帕斯(Scopus)

    摘要

    A charge pump circuit realized with the substrate-isolated polysilicon diode in the 0.25 μm CMOS process is proposed. With the polysilicon diode, the stable negative voltage generation can be realized in general sub-quarter-micron CMOS process without extra process modification or additional mask layer. The device characteristic of polysilicon diode and the voltage waveforms of the negative charge pump circuit have been successfully verified in a 0.25 μm CMOS process with grounded p-type substrate.

    原文English
    主出版物標題2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings
    發行者Institute of Electrical and Electronics Engineers Inc.
    頁面145-148
    頁數4
    ISBN(電子)0780373634, 9780780373631
    DOIs
    出版狀態Published - 2002
    事件3rd IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Taipei, 台灣
    持續時間: 6 8月 20028 8月 2002

    出版系列

    名字2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings

    Conference

    Conference3rd IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002
    國家/地區台灣
    城市Taipei
    期間6/08/028/08/02

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