Design of High-RA STT-MRAM for Future Energy-Efficient In-Memory Computing

Ming Chun Hong, Yi Hui Su, Guan Long Chen, Yu Chen Hsin, Yao Jen Chang, Kuan Ming Chen, Shan Yi Yang, I. Jung Wang, Sk Ziaur Rahaman, Hsin Han Lee, Jeng Hua Wei, Shyh Shyuan Sheu, Wei Chung Lo, Shih Chieh Chang, Tuo Hung Hou*

*此作品的通信作者

研究成果: Conference contribution同行評審

摘要

In contrast to the low-RA STT-MRAM for memory applications, high-RA (> 500 Ω-μ m2) STT-MRAM with high cell resistance (1 M Ω) is required to support energy-efficient in-memory computing beyond 10 POPS/W. Scaling the coercive magnetic field and cell dimension and increasing the MgO thickness are found critical for enlarging RA and write margin.

原文English
主出版物標題2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9798350334166
DOIs
出版狀態Published - 2023
事件2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Hsinchu, Taiwan
持續時間: 17 4月 202320 4月 2023

出版系列

名字2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings

Conference

Conference2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023
國家/地區Taiwan
城市Hsinchu
期間17/04/2320/04/23

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