Design of analog pixel memory circuit with low temperature polycrystalline silicon TFTs for low power application

Li Wei Chu*, Po-Tsun Liu, Ming-Dou Ker, Guang Ting Zheng, Yu Hsuan Li, Chung Hung Kuo, Chun Huai Li, Yao Jen Hsieh, Chun Ting Liu

*此作品的通信作者

研究成果: Conference contribution同行評審

8 引文 斯高帕斯(Scopus)

摘要

A new analog pixel memory cell realized in a 3-μm LTPS technology is proposed to achieve low-power consumption for TFT-LCDs. By employing the inversion data in storage capacitor with complementary source follower, the frame rate to refresh the static image can be reduced from 60Hz to 3Hz with output decay only less than 0.075V under the input data from IV to 4V.

原文English
主出版物標題48th Annual SID Symposium, Seminar, and Exhibition 2010, Display Week 2010
頁面1363-1366
頁數4
41
版本1
DOIs
出版狀態Published - 1 12月 2010
事件48th Annual SID Symposium, Seminar, and Exhibition 2010, Display Week 2010 - Seattle, WA, United States
持續時間: 23 5月 201028 5月 2010

Conference

Conference48th Annual SID Symposium, Seminar, and Exhibition 2010, Display Week 2010
國家/地區United States
城市Seattle, WA
期間23/05/1028/05/10

指紋

深入研究「Design of analog pixel memory circuit with low temperature polycrystalline silicon TFTs for low power application」主題。共同形成了獨特的指紋。

引用此