A new 2xVDD-tolerant power-rail ESD clamp circuit with voltage-level detection realized by 1xVDD devices is proposed against false trigger issue under fast power-on condition. All the 1xVDD devices in the proposed 2xVDD-tolerant ESD circuit are safely operated without gate oxide reliability issue. The proposed ESD clamp circuit has been implemented and verified in a 0.18-μm CMOS technology with 1.8-V devices. The experimental results have confirmed that the proposed ESD clamp circuit sustains a good HBM ESD level of 5.25kV and high immunity against false trigger issue under fast power-on condition. Moreover, polysilicon diodes are also verified to further reduce the stand-by leakage current of the proposed 2xVDD-tolerant power-rail ESD clamp circuit.