Design of 2xVDD-tolerant I/O buffer with 1xVDD CMOS devices

Ming-Dou Ker*, Yan Liang Lin

*此作品的通信作者

    研究成果: Conference contribution同行評審

    12 引文 斯高帕斯(Scopus)

    摘要

    A new 2xVDD-tolerant I/O buffer realized with only 1xVDD devices has been proposed and verified in a 0.18-μm CMOS process. With the dynamic source output technique and the new gate-controlled circuit, the new proposed I/O buffer can transmit and receive the signals with the voltage swing twice as high as the normal power supply voltage (VDD) without suffering gate-oxide reliability problem. The proposed 2xVDD-tolerant I/O circuit solution can be implemented in different nanoscale CMOS processes to meet the mixed-voltage interface applications in microelectronic systems.

    原文English
    主出版物標題2009 IEEE Custom Integrated Circuits Conference, CICC '09
    頁面539-542
    頁數4
    DOIs
    出版狀態Published - 1 12月 2009
    事件2009 IEEE Custom Integrated Circuits Conference, CICC '09 - San Jose, CA, United States
    持續時間: 13 9月 200916 9月 2009

    出版系列

    名字Proceedings of the Custom Integrated Circuits Conference
    ISSN(列印)0886-5930

    Conference

    Conference2009 IEEE Custom Integrated Circuits Conference, CICC '09
    國家/地區United States
    城市San Jose, CA
    期間13/09/0916/09/09

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