This paper presents a 2.5V/5V mixed-voltage CMOS I/O buffer that does not need a CMOS technology with a dual-oxide option and complex bias circuits. The proposed mixed-voltage I/O buffer with simpler circuit structure can overcome the problems of leakage current and gate-oxide reliability, which occurring in the conventional CMOS I/O buffer. In this work, the new proposed design has been realized in a 0.25-μm CMOS process, but it can be easily scaled toward 0.18-μm or 0.15-μm processes to serve a 1.8V/3.3V mixed-voltage I/O interface.
|期刊||Proceedings - IEEE International Symposium on Circuits and Systems|
|出版狀態||Published - 14 7月 2003|
|事件||Proceedings of the 2003 IEEE International Symposium on Circuits and Systems - Bangkok, Thailand|
持續時間: 25 5月 2003 → 28 5月 2003