Design of 2.5V/5V mixed-voltage CMOS I/O buffer with only thin oxide device and dynamic N-well bias circuit

Ming-Dou Ker*, Chia Sheng Tsai

*此作品的通信作者

    研究成果: Conference article同行評審

    25 引文 斯高帕斯(Scopus)

    摘要

    This paper presents a 2.5V/5V mixed-voltage CMOS I/O buffer that does not need a CMOS technology with a dual-oxide option and complex bias circuits. The proposed mixed-voltage I/O buffer with simpler circuit structure can overcome the problems of leakage current and gate-oxide reliability, which occurring in the conventional CMOS I/O buffer. In this work, the new proposed design has been realized in a 0.25-μm CMOS process, but it can be easily scaled toward 0.18-μm or 0.15-μm processes to serve a 1.8V/3.3V mixed-voltage I/O interface.

    原文English
    期刊Proceedings - IEEE International Symposium on Circuits and Systems
    5
    DOIs
    出版狀態Published - 14 7月 2003
    事件Proceedings of the 2003 IEEE International Symposium on Circuits and Systems - Bangkok, 泰國
    持續時間: 25 5月 200328 5月 2003

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