Design and performance analysis for the Multimedia Function Unit of the NSC-98 CPU

Jin Fu Ueng; I-Chen Wu; Y. H. Kuo; Ling Yuan Kao; Chao Lieh Chen; Yi Jai Huang; Sheng Yuan Lin; Chien Hua Hsu

doi:10.1109/ICICS.1997.652246

Design and performance analysis for the Multimedia Function Unit of the NSC-98 CPU

Jin Fu Ueng^*, I-Chen Wu, Y. H. Kuo, Ling Yuan Kao, Chao Lieh Chen, Yi Jai Huang, Sheng Yuan Lin, Chien Hua Hsu

^*此作品的通信作者

資訊工程學系

研究成果 › 同行評審

2 引文斯高帕斯（Scopus）

摘要

Leveraging Taiwan's hardware technologies, National Science Council in Taiwan proposed a project to design an advanced CPU, called NSC-98, compatible to the Intel MMX architecture. This paper discusses the design of multimedia extension, called MFU (Multimedia Function Unit), in this CPU. The MFU has the following two special features. (1) Support three more instructions for permutation operations, parallel distance operations, and parallel average operations; (2) implement two MFU subunits: one without the parallel multiplier and the other without the parallel shifter and converter (for permutation). This paper also does performance analysis by estimating the performances of the MFU with and without these features, on some chosen multimedia benchmarks. These performance analysis results can justify our MFU design.

原文	English
頁面	1513-1517
頁數	5
DOIs	https://doi.org/10.1109/ICICS.1997.652246
出版狀態	Published - 1997
事件	Proceedings of the 1997 1st International Conference on Information, Communications and Signal Processing, ICICS. Part 3 (of 3) - Singapore, Singapore 持續時間: 9 9月 1997 → 12 9月 1997

Conference

Conference	Proceedings of the 1997 1st International Conference on Information, Communications and Signal Processing, ICICS. Part 3 (of 3)
城市	Singapore, Singapore
期間	9/09/97 → 12/09/97

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10.1109/ICICS.1997.652246

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Ueng, J. F., Wu, I.-C., Kuo, Y. H., Kao, L. Y., Chen, C. L., Huang, Y. J., Lin, S. Y., & Hsu, C. H. (1997). Design and performance analysis for the Multimedia Function Unit of the NSC-98 CPU. 1513-1517. 論文發表於 Proceedings of the 1997 1st International Conference on Information, Communications and Signal Processing, ICICS. Part 3 (of 3), Singapore, Singapore. https://doi.org/10.1109/ICICS.1997.652246

@conference{1cc4f5fdf5914b7d8c6d246de5e18e68,

title = "Design and performance analysis for the Multimedia Function Unit of the NSC-98 CPU",

abstract = "Leveraging Taiwan's hardware technologies, National Science Council in Taiwan proposed a project to design an advanced CPU, called NSC-98, compatible to the Intel MMX architecture. This paper discusses the design of multimedia extension, called MFU (Multimedia Function Unit), in this CPU. The MFU has the following two special features. (1) Support three more instructions for permutation operations, parallel distance operations, and parallel average operations; (2) implement two MFU subunits: one without the parallel multiplier and the other without the parallel shifter and converter (for permutation). This paper also does performance analysis by estimating the performances of the MFU with and without these features, on some chosen multimedia benchmarks. These performance analysis results can justify our MFU design.",

author = "Ueng, {Jin Fu} and I-Chen Wu and Kuo, {Y. H.} and Kao, {Ling Yuan} and Chen, {Chao Lieh} and Huang, {Yi Jai} and Lin, {Sheng Yuan} and Hsu, {Chien Hua}",

year = "1997",

doi = "10.1109/ICICS.1997.652246",

language = "English",

pages = "1513--1517",

note = "Proceedings of the 1997 1st International Conference on Information, Communications and Signal Processing, ICICS. Part 3 (of 3) ; Conference date: 09-09-1997 Through 12-09-1997",

}

Ueng, JF, Wu, I-C, Kuo, YH, Kao, LY, Chen, CL, Huang, YJ, Lin, SY & Hsu, CH 1997, 'Design and performance analysis for the Multimedia Function Unit of the NSC-98 CPU', 論文發表於 Proceedings of the 1997 1st International Conference on Information, Communications and Signal Processing, ICICS. Part 3 (of 3), Singapore, Singapore, 9/09/97 - 12/09/97 頁 1513-1517. https://doi.org/10.1109/ICICS.1997.652246

TY - CONF

T1 - Design and performance analysis for the Multimedia Function Unit of the NSC-98 CPU

AU - Ueng, Jin Fu

AU - Wu, I-Chen

AU - Kuo, Y. H.

AU - Kao, Ling Yuan

AU - Chen, Chao Lieh

AU - Huang, Yi Jai

AU - Lin, Sheng Yuan

AU - Hsu, Chien Hua

PY - 1997

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N2 - Leveraging Taiwan's hardware technologies, National Science Council in Taiwan proposed a project to design an advanced CPU, called NSC-98, compatible to the Intel MMX architecture. This paper discusses the design of multimedia extension, called MFU (Multimedia Function Unit), in this CPU. The MFU has the following two special features. (1) Support three more instructions for permutation operations, parallel distance operations, and parallel average operations; (2) implement two MFU subunits: one without the parallel multiplier and the other without the parallel shifter and converter (for permutation). This paper also does performance analysis by estimating the performances of the MFU with and without these features, on some chosen multimedia benchmarks. These performance analysis results can justify our MFU design.

AB - Leveraging Taiwan's hardware technologies, National Science Council in Taiwan proposed a project to design an advanced CPU, called NSC-98, compatible to the Intel MMX architecture. This paper discusses the design of multimedia extension, called MFU (Multimedia Function Unit), in this CPU. The MFU has the following two special features. (1) Support three more instructions for permutation operations, parallel distance operations, and parallel average operations; (2) implement two MFU subunits: one without the parallel multiplier and the other without the parallel shifter and converter (for permutation). This paper also does performance analysis by estimating the performances of the MFU with and without these features, on some chosen multimedia benchmarks. These performance analysis results can justify our MFU design.

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DO - 10.1109/ICICS.1997.652246

M3 - Paper

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EP - 1517

T2 - Proceedings of the 1997 1st International Conference on Information, Communications and Signal Processing, ICICS. Part 3 (of 3)

Y2 - 9 September 1997 through 12 September 1997

ER -

Design and performance analysis for the Multimedia Function Unit of the NSC-98 CPU

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