Design and implementation of an FPGA-based control IC for the single-phase PWM inverter used in an UPS

Shih Liang Jung*, Meng Yueh Chang, Jin Yi Jyang, Hsiang Sung Huang, Li Chia Yeh, Ying-Yu Tzou

*此作品的通信作者

研究成果同行評審

9 引文 斯高帕斯(Scopus)

摘要

This paper presents an FPGA-based multiple-loop control scheme for the regulation of the PWM inverters used in UPS. The proposed control scheme incorporates an inner current loop with an outer voltage loop to regulate the output voltage of the PWM inverter, which is expected to be sinusoidal. The corresponding control gains are designed through deadbeat theory so that the inverter can achieve fast dynamic response. An output voltage decoupling mechanism and a load disturbance compensation scheme have been proposed to improve the stiffness of the controlled PWM inverter. The developed digital controller has been realized by a RAM-based FPGA XC4010 to verify its effectiveness. The simulation and experimental results show that the output voltage of the controlled PWM inverter has good transient response and little distortion under rough load conditions.

原文English
頁面344-349
頁數6
DOIs
出版狀態Published - 26 5月 1997
事件Proceedings of the 1997 2nd International Conference on Power Electronics and Drive Systems, PEDS. Part 2 (of 2) - Singapore, Singapore
持續時間: 26 5月 199729 5月 1997

Conference

ConferenceProceedings of the 1997 2nd International Conference on Power Electronics and Drive Systems, PEDS. Part 2 (of 2)
城市Singapore, Singapore
期間26/05/9729/05/97

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