摘要
We have proposed a structure design of single-photon avalanche diode fabricated in the Taiwan Semiconductor Manufacturing Company Ltd. (TSMC) 0.18- μm high-voltage (HV) CMOS technology, which improves the limited operating excess voltage for an n-on-p design without any other customized well layer. With the introduction of a deep p-well isolation (ISO) layer, the excess bias is significantly elevated, so that the device exhibits high photon detection probability (PDP) with relatively low dark count rate. The n-on-p-type device is favorable for 3-D-stacked backside illuminated structure and can attain high PDP at longer wavelength. With the improved jitter and after-pulsing probability, our designed device can be suitable for the application of light detection and ranging (LiDAR).
原文 | English |
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頁(從 - 到) | 582-587 |
頁數 | 6 |
期刊 | IEEE Transactions on Electron Devices |
卷 | 70 |
發行號 | 2 |
DOIs | |
出版狀態 | Published - 1 2月 2023 |