Demonstration of Differential Mode FeFET-Array for multi-precision storage and IMC applications

Vivek Parmar; Franz Muller; Jing Hua Hsuen; Sandeep Kaur Kingra; Yannick Raffel; Maximillian Lederer; Tarek Ali; Stefan Dunkel; Konrad Seidel; Sven Beyer; Tian Li Wu; Thomas Kampfe; Sourav De; Manan Suri

doi:10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134180

Demonstration of Differential Mode FeFET-Array for multi-precision storage and IMC applications

Vivek Parmar, Franz Muller, Jing Hua Hsuen, Sandeep Kaur Kingra, Yannick Raffel, Maximillian Lederer, Tarek Ali, Stefan Dunkel, Konrad Seidel, Sven Beyer, Tian Li Wu, Thomas Kampfe, Sourav De, Manan Suri

研究成果: Conference contribution › 同行評審

3 引文斯高帕斯（Scopus）

摘要

Harnessing multibit precision in non-volatile memory (NVM) based synaptic core can accelerate multiply and accumulate (MAC) operation of deep neural network (DNN). However, NVM-based synaptic cores suffer from the trade-off between bit density and performance. The undesired performance degradation with scaling, limited bit precision, and asymmetry associated with weight update poses a severe bottleneck in realizing a high-density synaptic core. In this work, we demonstrate: (i) implementation of novel differential mode ferroelectric field effect transistor (FeFET) (DM-FeFET) based multibit crossbar array of 12 Kbit size. (ii) bit density of 223Mb/mm2, which is ∼2x improvement compared to conventional FeFET array; (iii) 196 TOPS/W energy efficiency for VGG-8 network and (iv) superior bit error rate (BER) resilience showing ∼94% training and 88% inference accuracy with 1% BER.

原文	English
主出版物標題	2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings
發行者	Institute of Electrical and Electronics Engineers Inc.
ISBN（電子）	9798350334166
DOIs	https://doi.org/10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134180
出版狀態	Published - 2023
事件	2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Hsinchu, 台灣持續時間: 17 4月 2023 → 20 4月 2023

出版系列

名字	2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings

Conference

Conference	2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023
國家/地區	台灣
城市	Hsinchu
期間	17/04/23 → 20/04/23

UN SDG

此研究成果有助於以下永續發展目標

存取文件

10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134180

其它文件與鏈接

Link to publication in Scopus

引用此

Parmar, V., Muller, F., Hsuen, J. H., Kingra, S. K., Raffel, Y., Lederer, M., Ali, T., Dunkel, S., Seidel, K., Beyer, S., Wu, T. L., Kampfe, T., De, S., & Suri, M. (2023). Demonstration of Differential Mode FeFET-Array for multi-precision storage and IMC applications. 於 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings (2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134180

Parmar, Vivek ; Muller, Franz ; Hsuen, Jing Hua 等. / Demonstration of Differential Mode FeFET-Array for multi-precision storage and IMC applications. 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2023. (2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings).

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title = "Demonstration of Differential Mode FeFET-Array for multi-precision storage and IMC applications",

abstract = "Harnessing multibit precision in non-volatile memory (NVM) based synaptic core can accelerate multiply and accumulate (MAC) operation of deep neural network (DNN). However, NVM-based synaptic cores suffer from the trade-off between bit density and performance. The undesired performance degradation with scaling, limited bit precision, and asymmetry associated with weight update poses a severe bottleneck in realizing a high-density synaptic core. In this work, we demonstrate: (i) implementation of novel differential mode ferroelectric field effect transistor (FeFET) (DM-FeFET) based multibit crossbar array of 12 Kbit size. (ii) bit density of 223Mb/mm2, which is ∼2x improvement compared to conventional FeFET array; (iii) 196 TOPS/W energy efficiency for VGG-8 network and (iv) superior bit error rate (BER) resilience showing ∼94% training and 88% inference accuracy with 1% BER.",

author = "Vivek Parmar and Franz Muller and Hsuen, {Jing Hua} and Kingra, {Sandeep Kaur} and Yannick Raffel and Maximillian Lederer and Tarek Ali and Stefan Dunkel and Konrad Seidel and Sven Beyer and Wu, {Tian Li} and Thomas Kampfe and Sourav De and Manan Suri",

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year = "2023",

doi = "10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134180",

language = "English",

series = "2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings",

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Parmar, V, Muller, F, Hsuen, JH, Kingra, SK, Raffel, Y, Lederer, M, Ali, T, Dunkel, S, Seidel, K, Beyer, S, Wu, TL, Kampfe, T, De, S & Suri, M 2023, Demonstration of Differential Mode FeFET-Array for multi-precision storage and IMC applications. 於 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings. 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings, Institute of Electrical and Electronics Engineers Inc., 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023, Hsinchu, 台灣, 17/04/23. https://doi.org/10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134180

Demonstration of Differential Mode FeFET-Array for multi-precision storage and IMC applications. / Parmar, Vivek; Muller, Franz; Hsuen, Jing Hua 等.
2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2023. (2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings).

研究成果: Conference contribution › 同行評審

TY - GEN

T1 - Demonstration of Differential Mode FeFET-Array for multi-precision storage and IMC applications

AU - Parmar, Vivek

AU - Muller, Franz

AU - Hsuen, Jing Hua

AU - Kingra, Sandeep Kaur

AU - Raffel, Yannick

AU - Lederer, Maximillian

AU - Ali, Tarek

AU - Dunkel, Stefan

AU - Seidel, Konrad

AU - Beyer, Sven

AU - Wu, Tian Li

AU - Kampfe, Thomas

AU - De, Sourav

AU - Suri, Manan

PY - 2023

Y1 - 2023

N2 - Harnessing multibit precision in non-volatile memory (NVM) based synaptic core can accelerate multiply and accumulate (MAC) operation of deep neural network (DNN). However, NVM-based synaptic cores suffer from the trade-off between bit density and performance. The undesired performance degradation with scaling, limited bit precision, and asymmetry associated with weight update poses a severe bottleneck in realizing a high-density synaptic core. In this work, we demonstrate: (i) implementation of novel differential mode ferroelectric field effect transistor (FeFET) (DM-FeFET) based multibit crossbar array of 12 Kbit size. (ii) bit density of 223Mb/mm2, which is ∼2x improvement compared to conventional FeFET array; (iii) 196 TOPS/W energy efficiency for VGG-8 network and (iv) superior bit error rate (BER) resilience showing ∼94% training and 88% inference accuracy with 1% BER.

AB - Harnessing multibit precision in non-volatile memory (NVM) based synaptic core can accelerate multiply and accumulate (MAC) operation of deep neural network (DNN). However, NVM-based synaptic cores suffer from the trade-off between bit density and performance. The undesired performance degradation with scaling, limited bit precision, and asymmetry associated with weight update poses a severe bottleneck in realizing a high-density synaptic core. In this work, we demonstrate: (i) implementation of novel differential mode ferroelectric field effect transistor (FeFET) (DM-FeFET) based multibit crossbar array of 12 Kbit size. (ii) bit density of 223Mb/mm2, which is ∼2x improvement compared to conventional FeFET array; (iii) 196 TOPS/W energy efficiency for VGG-8 network and (iv) superior bit error rate (BER) resilience showing ∼94% training and 88% inference accuracy with 1% BER.

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U2 - 10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134180

DO - 10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134180

M3 - Conference contribution

AN - SCOPUS:85153722628

T3 - 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings

BT - 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023

Y2 - 17 April 2023 through 20 April 2023

ER -

Parmar V, Muller F, Hsuen JH, Kingra SK, Raffel Y, Lederer M 等. Demonstration of Differential Mode FeFET-Array for multi-precision storage and IMC applications. 於 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2023. (2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings). doi: 10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134180

Demonstration of Differential Mode FeFET-Array for multi-precision storage and IMC applications

摘要

出版系列

Conference

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