Demonstration of Differential Mode FeFET-Array for multi-precision storage and IMC applications

Vivek Parmar, Franz Muller, Jing Hua Hsuen, Sandeep Kaur Kingra, Yannick Raffel, Maximillian Lederer, Tarek Ali, Stefan Dunkel, Konrad Seidel, Sven Beyer, Tian Li Wu, Thomas Kampfe, Sourav De, Manan Suri

研究成果: Conference contribution同行評審

1 引文 斯高帕斯(Scopus)

摘要

Harnessing multibit precision in non-volatile memory (NVM) based synaptic core can accelerate multiply and accumulate (MAC) operation of deep neural network (DNN). However, NVM-based synaptic cores suffer from the trade-off between bit density and performance. The undesired performance degradation with scaling, limited bit precision, and asymmetry associated with weight update poses a severe bottleneck in realizing a high-density synaptic core. In this work, we demonstrate: (i) implementation of novel differential mode ferroelectric field effect transistor (FeFET) (DM-FeFET) based multibit crossbar array of 12 Kbit size. (ii) bit density of 223Mb/mm2, which is ∼2x improvement compared to conventional FeFET array; (iii) 196 TOPS/W energy efficiency for VGG-8 network and (iv) superior bit error rate (BER) resilience showing ∼94% training and 88% inference accuracy with 1% BER.

原文English
主出版物標題2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9798350334166
DOIs
出版狀態Published - 2023
事件2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Hsinchu, Taiwan
持續時間: 17 4月 202320 4月 2023

出版系列

名字2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings

Conference

Conference2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023
國家/地區Taiwan
城市Hsinchu
期間17/04/2320/04/23

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