Delay-difference DLL and its-application on skewed output buffer

Keyphrases

• 2D Array 11%
• Clock Phase 11%
• Clock Skew 11%
• CMOS Technology 22%
• Delay Difference 100%
• Delay-locked Loop 100%
• Loop Array 22%
• Loop Structure 11%
• Measurement Results 22%
• Multiple Clocks 11%
• Output Buffer 100%
• Output Signal 11%
• Peak-to-peak Jitter 11%
• Rise Time 11%
• Self-bias 11%
• Switching Time 11%

Engineering

• Delay Difference 100%
• Locked Loop 100%
• Output Signal 11%
• Rise Time 11%
• Switching Time 11%