Defect detection for short-loop process and SRAM-cell optimization by using Addressable Failure Site Test Structures (AFS-TS)

Kelvin Yih Yuh Doong, Sunnys Hsieh, S. C. Lin, J. R. Wang, Binson Shen, L. J. Hung, Jyh-Chyurn Guo, I. C. Chen, K. L. Young, Charles Ching-Hsiang Hsu

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摘要

This work describes the utilization of a novel test structure called addressable failure site test structure for short-loop defect detection and proposed a prototype test structure for SRAM process defect detection in advanced semiconductor manufacturing. The novel test structures are used to identify the locations of killer defects which are then used to wafer map defect sites. This simple and efficient killer defect identification of process steps is employed as yield enhancement strategy.

原文English
頁(從 - 到)81-87
頁數7
期刊Proceedings of SPIE-The International Society for Optical Engineering
4692
DOIs
出版狀態Published - 1 1月 2002

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