DECADES: A 67mm2, 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET

Fei Gao; Ting Jung Chang; Ang Li; Marcelo Orenes-Vera; Davide Giri; Paul J. Jackson; August Ning; Georgios Tziantzioulis; Joseph Zuckerman; Jinzheng Tu; Kaifeng Xu; Grigory Chirkov; Gabriele Tombesi; Jonathan Balkind; Margaret Martonosi; Luca Carloni; David Wentzlaff

doi:10.1109/CICC57935.2023.10121257

DECADES: A 67mm², 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET

Fei Gao^*, Ting Jung Chang, Ang Li, Marcelo Orenes-Vera, Davide Giri, Paul J. Jackson, August Ning, Georgios Tziantzioulis, Joseph Zuckerman, Jinzheng Tu, Kaifeng Xu, Grigory Chirkov, Gabriele Tombesi, Jonathan Balkind, Margaret Martonosi, Luca Carloni, David Wentzlaff

^*此作品的通信作者

資訊工程學系

研究成果: Conference contribution › 同行評審

4 引文斯高帕斯（Scopus）

摘要

As Moore's Law is coming to an end, heterogeneous SoCs have become ubiquitous, improving performance and efficiency with specialized hardware. However, the addition of hardware accelerators makes data supply more challenging. Feeding data to accelerators becomes a bottleneck, especially for data-intensive workloads such as graph analytics, sparse linear algebra, and machine learning applications. DECADES addresses this issue with a combination of accelerators, embedded FPGA (eFPGA), and its unique ''intelligent storage'' (IS) tile. DECADES is one of the largest chips ever built in academia and has the highest core count of cache-coherent, OS-capable, 64-bit RISC-V processors.

原文	English
主出版物標題	2023 IEEE Custom Integrated Circuits Conference, CICC 2023 - Proceedings
發行者	Institute of Electrical and Electronics Engineers Inc.
ISBN（電子）	9798350399486
DOIs	https://doi.org/10.1109/CICC57935.2023.10121257
出版狀態	Published - 2023
事件	44th Annual IEEE Custom Integrated Circuits Conference, CICC 2023 - San Antonio, 美國持續時間: 23 4月 2023 → 26 4月 2023

出版系列

名字	Proceedings of the Custom Integrated Circuits Conference
卷	2023-April
ISSN（列印）	0886-5930

Conference

Conference	44th Annual IEEE Custom Integrated Circuits Conference, CICC 2023
國家/地區	美國
城市	San Antonio
期間	23/04/23 → 26/04/23

存取文件

10.1109/CICC57935.2023.10121257

其它文件與鏈接

Link to publication in Scopus

引用此

Gao, F., Chang, T. J., Li, A., Orenes-Vera, M., Giri, D., Jackson, P. J., Ning, A., Tziantzioulis, G., Zuckerman, J., Tu, J., Xu, K., Chirkov, G., Tombesi, G., Balkind, J., Martonosi, M., Carloni, L., & Wentzlaff, D. (2023). DECADES: A 67mm², 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET. 於 2023 IEEE Custom Integrated Circuits Conference, CICC 2023 - Proceedings (Proceedings of the Custom Integrated Circuits Conference; 卷 2023-April). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CICC57935.2023.10121257

Gao, Fei ; Chang, Ting Jung ; Li, Ang 等. / DECADES : A 67mm², 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET. 2023 IEEE Custom Integrated Circuits Conference, CICC 2023 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2023. (Proceedings of the Custom Integrated Circuits Conference).

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title = "DECADES: A 67mm2, 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET",

abstract = "As Moore's Law is coming to an end, heterogeneous SoCs have become ubiquitous, improving performance and efficiency with specialized hardware. However, the addition of hardware accelerators makes data supply more challenging. Feeding data to accelerators becomes a bottleneck, especially for data-intensive workloads such as graph analytics, sparse linear algebra, and machine learning applications. DECADES addresses this issue with a combination of accelerators, embedded FPGA (eFPGA), and its unique ''intelligent storage'' (IS) tile. DECADES is one of the largest chips ever built in academia and has the highest core count of cache-coherent, OS-capable, 64-bit RISC-V processors.",

author = "Fei Gao and Chang, {Ting Jung} and Ang Li and Marcelo Orenes-Vera and Davide Giri and Jackson, {Paul J.} and August Ning and Georgios Tziantzioulis and Joseph Zuckerman and Jinzheng Tu and Kaifeng Xu and Grigory Chirkov and Gabriele Tombesi and Jonathan Balkind and Margaret Martonosi and Luca Carloni and David Wentzlaff",

note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 44th Annual IEEE Custom Integrated Circuits Conference, CICC 2023 ; Conference date: 23-04-2023 Through 26-04-2023",

year = "2023",

doi = "10.1109/CICC57935.2023.10121257",

language = "English",

series = "Proceedings of the Custom Integrated Circuits Conference",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2023 IEEE Custom Integrated Circuits Conference, CICC 2023 - Proceedings",

address = "美國",

}

Gao, F, Chang, TJ, Li, A, Orenes-Vera, M, Giri, D, Jackson, PJ, Ning, A, Tziantzioulis, G, Zuckerman, J, Tu, J, Xu, K, Chirkov, G, Tombesi, G, Balkind, J, Martonosi, M, Carloni, L & Wentzlaff, D 2023, DECADES: A 67mm², 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET. 於 2023 IEEE Custom Integrated Circuits Conference, CICC 2023 - Proceedings. Proceedings of the Custom Integrated Circuits Conference, 卷 2023-April, Institute of Electrical and Electronics Engineers Inc., 44th Annual IEEE Custom Integrated Circuits Conference, CICC 2023, San Antonio, 美國, 23/04/23. https://doi.org/10.1109/CICC57935.2023.10121257

DECADES: A 67mm², 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET. / Gao, Fei; Chang, Ting Jung; Li, Ang 等.
2023 IEEE Custom Integrated Circuits Conference, CICC 2023 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2023. (Proceedings of the Custom Integrated Circuits Conference; 卷 2023-April).

研究成果: Conference contribution › 同行評審

TY - GEN

T1 - DECADES

T2 - 44th Annual IEEE Custom Integrated Circuits Conference, CICC 2023

AU - Gao, Fei

AU - Chang, Ting Jung

AU - Li, Ang

AU - Orenes-Vera, Marcelo

AU - Giri, Davide

AU - Jackson, Paul J.

AU - Ning, August

AU - Tziantzioulis, Georgios

AU - Zuckerman, Joseph

AU - Tu, Jinzheng

AU - Xu, Kaifeng

AU - Chirkov, Grigory

AU - Tombesi, Gabriele

AU - Balkind, Jonathan

AU - Martonosi, Margaret

AU - Carloni, Luca

AU - Wentzlaff, David

PY - 2023

Y1 - 2023

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AB - As Moore's Law is coming to an end, heterogeneous SoCs have become ubiquitous, improving performance and efficiency with specialized hardware. However, the addition of hardware accelerators makes data supply more challenging. Feeding data to accelerators becomes a bottleneck, especially for data-intensive workloads such as graph analytics, sparse linear algebra, and machine learning applications. DECADES addresses this issue with a combination of accelerators, embedded FPGA (eFPGA), and its unique ''intelligent storage'' (IS) tile. DECADES is one of the largest chips ever built in academia and has the highest core count of cache-coherent, OS-capable, 64-bit RISC-V processors.

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M3 - Conference contribution

AN - SCOPUS:85160010027

T3 - Proceedings of the Custom Integrated Circuits Conference

BT - 2023 IEEE Custom Integrated Circuits Conference, CICC 2023 - Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

Y2 - 23 April 2023 through 26 April 2023

ER -

Gao F, Chang TJ, Li A, Orenes-Vera M, Giri D, Jackson PJ 等. DECADES: A 67mm², 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET. 於 2023 IEEE Custom Integrated Circuits Conference, CICC 2023 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2023. (Proceedings of the Custom Integrated Circuits Conference). doi: 10.1109/CICC57935.2023.10121257