Crystallinity Effect on Reliability of Sidewall Damascened Nanowire Poly-Si GAA FETs

Chuan Hui Shen, Wei Yen Chen, Chun Chih Chung, Yu En Huang, Tien-Sheng Chao*

*此作品的通信作者

研究成果: Conference contribution同行評審

摘要

Poly-Si GAA FETs using sidewall damascened method are successfully demonstrated. By manipulating the stress imposed by nitride layer, crystallinity of poly-Si can be modified by changing the thickness of top nitride. Devices with larger grain size and fewer defects lead to superior electrical characteristics. Hot carrier and gate stress reliability of devices were then investigated. With better crystallinity, electrical characteristics degrade less under hot carrier stress due to less electric field enhancement. On the contrary, degradation of gate stress reliability is less sensitive to different crystallinity level. This is owing to the smaller activation energy of hot carrier effect making it more sensitive to crystallinity. With better crystallinity, poly-Si GAA nanowire FETs possess not only better electrical characteristics but also degrade less under stressing.

原文English
主出版物標題2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020
發行者Institute of Electrical and Electronics Engineers Inc.
頁面53-54
頁數2
ISBN(電子)9781728197357
ISBN(列印)978-1-7281-9736-4
DOIs
出版狀態Published - 6月 2020
事件2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020 - Honolulu, United States
持續時間: 13 6月 202014 6月 2020

出版系列

名字2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020

Conference

Conference2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020
國家/地區United States
城市Honolulu
期間13/06/2014/06/20

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