Cross-layer dynamic prefetching allocation strategies for high-performance multicores

Yin Chi Peng, Chien Chih Chen, Chia Jung Chang, Tien-Fu Chen, Pen Chung Yew

研究成果: Conference contribution同行評審

2 引文 斯高帕斯(Scopus)

摘要

For the last decade, there have been varying techniques for hardware prefetchers to improve the system performance. However, due to limited space and bandwidth in a multicore system, the prefetching data fetched by prefetcher may pollute L1 cache even though the data is useful, thus resulting into significant performance degradation. Most contemporary multicore systems simply disable prefetching to avoid unexpected contention. This paper proposes a cross-layer and dynamic Prefetch Allocation Management (PAM) to provide better caching strategies in a parallel environment. Our approach has two main mechanisms, targeting at the different prefetch degree and location choices to minimize the cache pollution and contention. Across a variety of SPLASH2 and PARSEC benchmark, our PAM approach can contribute up to 12% of performance improvement on a 4-core multicore system compared to the static prefetcher configuration and also saves 9.1% of the memory bandwidth consumption of memory system.

原文English
主出版物標題2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013
DOIs
出版狀態Published - 2013
事件2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013 - Hsinchu, Taiwan
持續時間: 22 4月 201324 4月 2013

出版系列

名字2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013

Conference

Conference2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013
國家/地區Taiwan
城市Hsinchu
期間22/04/1324/04/13

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