TY - GEN
T1 - Cross layer design to multi-thread a data-pipelining application on a multi-processor on chip
AU - Lai, Bo-Cheng
AU - Schaumont, Patrick
AU - Qin, Wei
AU - Verbauwhede, Ingrid
PY - 2006
Y1 - 2006
N2 - Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor platform spans multiple design layers, including the application layer, the system software layer, the architecture layer and the micro-architecture layer. For best results, designers have to consider multiple design layers (vertical exploration) and multiple architecture options (horizontal exploration). By using a data-pipelining JPEG encoder as the application driver, this paper presents a comprehensive analysis of mapping a data-pipelined application through multiple design layers, to a shared-memory SMP (Symmetric Multi-Processing) system. It is shown that a single-layered optimization ends up with a 110% worse design if the system effects from other layers are not taken into account. Compared to the nominal case, with appropriate mapping of the application, we achieve 47.5% improvement for high performance design and 77.6% energy reduction for energy efficient design under constant performance.
AB - Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor platform spans multiple design layers, including the application layer, the system software layer, the architecture layer and the micro-architecture layer. For best results, designers have to consider multiple design layers (vertical exploration) and multiple architecture options (horizontal exploration). By using a data-pipelining JPEG encoder as the application driver, this paper presents a comprehensive analysis of mapping a data-pipelined application through multiple design layers, to a shared-memory SMP (Symmetric Multi-Processing) system. It is shown that a single-layered optimization ends up with a 110% worse design if the system effects from other layers are not taken into account. Compared to the nominal case, with appropriate mapping of the application, we achieve 47.5% improvement for high performance design and 77.6% energy reduction for energy efficient design under constant performance.
UR - http://www.scopus.com/inward/record.url?scp=34547413390&partnerID=8YFLogxK
U2 - 10.1109/ASAP.2006.24
DO - 10.1109/ASAP.2006.24
M3 - Conference contribution
AN - SCOPUS:34547413390
SN - 0769526829
SN - 9780769526829
T3 - Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors
SP - 15
EP - 18
BT - Proceedings - IEEE 17th International Conference on Application-specific Systems, Architectures and Processors, ASAP 2006
T2 - IEEE 17th International Conference on Application-specific Systems, Architectures and Processors, ASAP 2006
Y2 - 11 September 2006 through 13 September 2006
ER -