TY - JOUR
T1 - Cooperative multithreading on embedded multiprocessor architectures enables energy-scalable design
AU - Schaumont, Patrick
AU - Lai, Bo-Cheng
AU - Qin, Wei
AU - Verbauwhede, Ingrid
PY - 2005/12/1
Y1 - 2005/12/1
N2 - We propose an embedded multiprocessor architecture and its associated thread-based programming model. Using a cycle-true simulation model of this architecture, we are able to estimate energy savings for a threaded C program. The savings are obtained by voltage- and frequency-scaling of the individual processors. We port a fingerprint minutiae detection application onto this architecture, and show the resulting performance on single-, dual-, and quad-processor configurations. The energy-scaled quad-processor version results in a 77% energy reduction over the single-processor non-scaled implementation, at only a 2.2% degradation in cycle count.
AB - We propose an embedded multiprocessor architecture and its associated thread-based programming model. Using a cycle-true simulation model of this architecture, we are able to estimate energy savings for a threaded C program. The savings are obtained by voltage- and frequency-scaling of the individual processors. We port a fingerprint minutiae detection application onto this architecture, and show the resulting performance on single-, dual-, and quad-processor configurations. The energy-scaled quad-processor version results in a 77% energy reduction over the single-processor non-scaled implementation, at only a 2.2% degradation in cycle count.
KW - Design
KW - Performance
UR - http://www.scopus.com/inward/record.url?scp=27944480434&partnerID=8YFLogxK
U2 - 10.1109/DAC.2005.193767
DO - 10.1109/DAC.2005.193767
M3 - Conference article
AN - SCOPUS:27944480434
SN - 0738-100X
SP - 27
EP - 30
JO - Proceedings - Design Automation Conference
JF - Proceedings - Design Automation Conference
M1 - 3.4
T2 - 42nd Design Automation Conference, DAC 2005
Y2 - 13 June 2005 through 17 June 2005
ER -