COMPUTER-AIDS FOR ANALYSIS AND SCALING OF EXTRINSIC DEVICES.

Mark R. Pinto*, Robert W. Dutton, Hiroshi Iwai, Conor S. Rafferty

*此作品的通信作者

研究成果: Conference article同行評審

14 引文 斯高帕斯(Scopus)

摘要

Scaling of VLSI requires coordinated analysis of all resistive, capacitive, and parasitic devices--especially those associated with isolation and CMOS well structures. Consideration is given here to the problem of intrinsic devices imbedded in a complete technology framework including parasitics. Results are presented for resistive and capacitive effects which influence intrinsic device performance. The role of velocity saturation on C//g //d is explained. Analysis of isolation structures shows the importance of nonplanar analysis and the effects of two-dimensional impurity distributions. A hierarchy of approaches for latch-up analysis is considered. Use of circuit-like one-dimensional analysis can give good results for some holding conditions. However, transient two-dimensional (2-D) results are needed to account for more complex triggering conditions. Results of 2-D simulation show critical process-dependent effects of triggering. The PISCES program is demonstrated to be a powerful tool for analysis of both intrinsic and parasitic 2-D device effects.

原文English
頁(從 - 到)288-291
頁數4
期刊Technical Digest - International Electron Devices Meeting
DOIs
出版狀態Published - 1984

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