Compute-in-Time for Deep Neural Network Accelerators: Challenges and Prospects

Hamza Al Maharmeh, Nabil J. Sarhan, Chung Chih Hung, Mohammed Ismail, Mohammad Alhawari

研究成果: Conference contribution同行評審

5 引文 斯高帕斯(Scopus)

摘要

Time-domain (TD) accelerators leverage both digital and analog features, thereby enabling energy-efficient computing and scaling with CMOS technology. This paper reviews state-of-the-art TD accelerators and discusses system considerations and hardware implementations, including the spatially unrolled and recursive TD architectures. Additionally, the paper analyzes the energy and area efficiency of the TD architectures for varying input resolutions and network sizes. This analysis provides insight for designers into how to choose the appropriate TD approach for a particular application.

原文English
主出版物標題2020 IEEE 63rd International Midwest Symposium on Circuits and Systems, MWSCAS 2020 - Proceedings
發行者Institute of Electrical and Electronics Engineers Inc.
頁面990-993
頁數4
ISBN(電子)9781538629161
DOIs
出版狀態Published - 8月 2020
事件63rd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2020 - Springfield, United States
持續時間: 9 8月 202012 8月 2020

出版系列

名字Midwest Symposium on Circuits and Systems
2020-August
ISSN(列印)1548-3746

Conference

Conference63rd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2020
國家/地區United States
城市Springfield
期間9/08/2012/08/20

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