TY - JOUR
T1 - Complementary silicide source/drain thin-body MOSFETs for the 20nm gate length regime
AU - Kedzierski, J.
AU - Xuan, P.
AU - Anderson, E. H.
AU - Bokor, J.
AU - King, T. J.
AU - Hu, Chen-Ming
PY - 2000/12/1
Y1 - 2000/12/1
N2 - Thin-body transistors with silicide source/drains were fabricated with gate-lengths down to 15nm. Complementary low-barrier silicides were used to reduce contact and series resistance. Minimum gate-length transistors with Tox=40Å show PMOS |Idsat|=270μA/μm and NMOS |Idsat|=190μA/μm with Vds=1.5V, |Vg-Vt|=1.2V and, Ion/Ioff>104. A simple transmission model, fitted to experimental data, is used to investigate effects of oxide scaling and extension doping.
AB - Thin-body transistors with silicide source/drains were fabricated with gate-lengths down to 15nm. Complementary low-barrier silicides were used to reduce contact and series resistance. Minimum gate-length transistors with Tox=40Å show PMOS |Idsat|=270μA/μm and NMOS |Idsat|=190μA/μm with Vds=1.5V, |Vg-Vt|=1.2V and, Ion/Ioff>104. A simple transmission model, fitted to experimental data, is used to investigate effects of oxide scaling and extension doping.
UR - http://www.scopus.com/inward/record.url?scp=0034453418&partnerID=8YFLogxK
U2 - 10.1109/IEDM.2000.904258
DO - 10.1109/IEDM.2000.904258
M3 - Conference article
AN - SCOPUS:0034453418
SN - 0163-1918
SP - 57
EP - 59
JO - Technical Digest - International Electron Devices Meeting
JF - Technical Digest - International Electron Devices Meeting
T2 - 2000 IEEE International Electron Devices Meeting
Y2 - 10 December 2000 through 13 December 2000
ER -