TY - JOUR
T1 - Compact low-noise power amplifier design and implementation for millimetre wave frequencies
AU - Tsao, Chien Ming
AU - Tsao, Yi Fan
AU - Lin, Tzu Shuen
AU - Huang, Ting Jui
AU - Hsu, Heng Tung
N1 - Publisher Copyright:
© The Institution of Engineering and Technology 2020
Copyright:
Copyright 2020 Elsevier B.V., All rights reserved.
PY - 2020/10/1
Y1 - 2020/10/1
N2 - In this paper, we have designed and realized a two-stage low-noise power amplifier (LNPA) with resistive feedback network targeting for Ka-band compact RF front-end applications. Featuring the characteristics of both low noise and high power at the same time, the LNPA is expected to be a possible one-chip replacement of power and low noise amplifiers integrated in a conventional transceiver/receiver (T/R) module. Such configuration features size compactness while reduces implementation complexity which is of crucial importance for integration in antenna arrays with large number of antenna elements. Implemented in 0.15-μm GaAs pseudomorphic high electron mobility transistor (pHEMT) technology, the LNPA, operating at 36–40 GHz, exhibits a peak gain of 15.96 dB, a minimum noise figure of 2.88 dB, a power consumption of 152 mW and a measured 1-dB compression output power of 14.92 dBm at 38 GHz, respectively. The LNPA also featured a very good linearity performance with a measured output third-order interception point (IP3) of 22.22 dBm at 38 GHz.
AB - In this paper, we have designed and realized a two-stage low-noise power amplifier (LNPA) with resistive feedback network targeting for Ka-band compact RF front-end applications. Featuring the characteristics of both low noise and high power at the same time, the LNPA is expected to be a possible one-chip replacement of power and low noise amplifiers integrated in a conventional transceiver/receiver (T/R) module. Such configuration features size compactness while reduces implementation complexity which is of crucial importance for integration in antenna arrays with large number of antenna elements. Implemented in 0.15-μm GaAs pseudomorphic high electron mobility transistor (pHEMT) technology, the LNPA, operating at 36–40 GHz, exhibits a peak gain of 15.96 dB, a minimum noise figure of 2.88 dB, a power consumption of 152 mW and a measured 1-dB compression output power of 14.92 dBm at 38 GHz, respectively. The LNPA also featured a very good linearity performance with a measured output third-order interception point (IP3) of 22.22 dBm at 38 GHz.
UR - http://www.scopus.com/inward/record.url?scp=85095722762&partnerID=8YFLogxK
U2 - 10.1049/iet-cds.2020.0274
DO - 10.1049/iet-cds.2020.0274
M3 - Article
AN - SCOPUS:85095722762
SN - 1751-858X
VL - 14
SP - 1026
EP - 1031
JO - IET Circuits, Devices and Systems
JF - IET Circuits, Devices and Systems
IS - 7
ER -