Communication—Potential of the π-gate InAs HEMTs for high-speed and low-power logic applications

Jing Neng Yao; Yueh Chin Lin; Ying Chieh Wong; Ting Jui Huang; Heng-Tung Hsu; Simon M. Sze; Edward Yi Chang

doi:10.1149/2.0141906jss

Communication—Potential of the π-gate InAs HEMTs for high-speed and low-power logic applications

Jing Neng Yao^*, Yueh Chin Lin, Ying Chieh Wong, Ting Jui Huang, Heng-Tung Hsu, Simon M. Sze, Edward Yi Chang

^*此作品的通信作者

研究成果: Article › 同行評審

1 引文斯高帕斯（Scopus）

摘要

Composite channel (In_0.65Ga_0.35As/InAs/ In_0.65Ga_0.35As) high electron mobility transistors (HEMTs) with π-gate structure were investigated for high-speed and low-power logic applications. The conventional and tri-gate MESA HEMTs were compared with the π-gate device for evaluation. The π-gate device exhibited the best maximum transconductance value of 1584 mS/mm, on-state current of 332mA/mm, subthreshold swing (SS) of 78.1 mV/decade, and I_ON/I_OFF ratio of 3 × 10⁴ at V_DS = 0.5 V at room temperature. These results indicated that the designed π-gate InAs devices improve the electrical characteristics of InAs HEMTs for high-speed and low-power logic applications.

原文	English
頁（從 - 到）	P319-P321
頁數	3
期刊	ECS Journal of Solid State Science and Technology
卷	8
發行號	6
DOIs	https://doi.org/10.1149/2.0141906jss
出版狀態	Published - 7 6月 2019

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title = "Communication—Potential of the π-gate InAs HEMTs for high-speed and low-power logic applications",

abstract = "Composite channel (In0.65Ga0.35As/InAs/ In0.65Ga0.35As) high electron mobility transistors (HEMTs) with π-gate structure were investigated for high-speed and low-power logic applications. The conventional and tri-gate MESA HEMTs were compared with the π-gate device for evaluation. The π-gate device exhibited the best maximum transconductance value of 1584 mS/mm, on-state current of 332mA/mm, subthreshold swing (SS) of 78.1 mV/decade, and ION/IOFF ratio of 3 × 104 at VDS = 0.5 V at room temperature. These results indicated that the designed π-gate InAs devices improve the electrical characteristics of InAs HEMTs for high-speed and low-power logic applications.",

keywords = "IMPACT IONIZATION; PERFORMANCE; TRANSISTOR; CMOS",

author = "Yao, {Jing Neng} and Lin, {Yueh Chin} and Wong, {Ying Chieh} and Huang, {Ting Jui} and Heng-Tung Hsu and Sze, {Simon M.} and Chang, {Edward Yi}",

year = "2019",

month = jun,

day = "7",

doi = "10.1149/2.0141906jss",

language = "English",

volume = "8",

pages = "P319--P321",

journal = "ECS Journal of Solid State Science and Technology",

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publisher = "Electrochemical Society, Inc.",

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TY - JOUR

T1 - Communication—Potential of the π-gate InAs HEMTs for high-speed and low-power logic applications

AU - Yao, Jing Neng

AU - Lin, Yueh Chin

AU - Wong, Ying Chieh

AU - Huang, Ting Jui

AU - Hsu, Heng-Tung

AU - Sze, Simon M.

AU - Chang, Edward Yi

PY - 2019/6/7

Y1 - 2019/6/7

N2 - Composite channel (In0.65Ga0.35As/InAs/ In0.65Ga0.35As) high electron mobility transistors (HEMTs) with π-gate structure were investigated for high-speed and low-power logic applications. The conventional and tri-gate MESA HEMTs were compared with the π-gate device for evaluation. The π-gate device exhibited the best maximum transconductance value of 1584 mS/mm, on-state current of 332mA/mm, subthreshold swing (SS) of 78.1 mV/decade, and ION/IOFF ratio of 3 × 104 at VDS = 0.5 V at room temperature. These results indicated that the designed π-gate InAs devices improve the electrical characteristics of InAs HEMTs for high-speed and low-power logic applications.

AB - Composite channel (In0.65Ga0.35As/InAs/ In0.65Ga0.35As) high electron mobility transistors (HEMTs) with π-gate structure were investigated for high-speed and low-power logic applications. The conventional and tri-gate MESA HEMTs were compared with the π-gate device for evaluation. The π-gate device exhibited the best maximum transconductance value of 1584 mS/mm, on-state current of 332mA/mm, subthreshold swing (SS) of 78.1 mV/decade, and ION/IOFF ratio of 3 × 104 at VDS = 0.5 V at room temperature. These results indicated that the designed π-gate InAs devices improve the electrical characteristics of InAs HEMTs for high-speed and low-power logic applications.

KW - IMPACT IONIZATION; PERFORMANCE; TRANSISTOR; CMOS

UR - http://www.scopus.com/inward/record.url?scp=85072052019&partnerID=8YFLogxK

U2 - 10.1149/2.0141906jss

DO - 10.1149/2.0141906jss

M3 - Article

AN - SCOPUS:85072052019

SN - 2162-8769

VL - 8

SP - P319-P321

JO - ECS Journal of Solid State Science and Technology

JF - ECS Journal of Solid State Science and Technology

IS - 6

ER -

Communication—Potential of the π-gate InAs HEMTs for high-speed and low-power logic applications

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