Combined plasma-enhanced-atomic-layer-deposition gate dielectric and in situ SiN cap layer for reduced threshold voltage shift and dynamic ON-resistance dispersion of AlGaN/GaN high electron mobility transistors on 200mm Si substrates

Nicolò Ronchi*, Brice De Jaeger, Marleen Van Hove, Robin Roelofs, Tian-Li Wu, Jie Hu, Xuanwu Kang, Stefaan Decoutere

*此作品的通信作者

研究成果: Article同行評審

6 引文 斯高帕斯(Scopus)

摘要

In this work we will present the experimental path followed to optimize the dynamic ON-resistance (RDS-ON) dispersion and to reduce the threshold voltage shift of AlGaN/GaN transistors grown on 200mm Si wafers. Firstly, it will be demonstrated that a SiN gate dielectric grown by means of plasma enhanced atomic layer deposition (PEALD) instead of rapid thermal chemical vapor deposition (RTCVD) reduces threshold voltage (Vth) shift induced by negative gate bias and the gate leakage. Secondly, the dynamic RDS-ON dispersion of two wafers with same gate dielectric (PEALD SiN) but different in situ metal organic chemical vapor deposition (MOCVD) capping layer, GaN or SiN, is compared. Results will show that the traps at the surface causing the RDS-ON dispersion can drastically be reduced by using in situ MOCVD SiN.

原文English
文章編號04DF02
期刊Japanese journal of applied physics
54
發行號4
DOIs
出版狀態Published - 1 4月 2015

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