TY - GEN
T1 - Cognitive Bus Coding Scheme for Inter-Chip Communications of Deep Learning Accelerator Chiplet on Low-cost Si and Glass Interposer
AU - Chang, Yu Hong
AU - Singh, Tourangbam Harishore
AU - Huang, Po Tsang
N1 - Publisher Copyright:
© 2022 IEEE.
PY - 2022
Y1 - 2022
N2 - In the present Artificial Intelligence (AI) hardware research, interposer based multi-chip Deep Learning Accelerator (DLA) system is one of the main technology. Silicon (Si) interposer is the main key in the emerging 2.5D integration process. However, signal integrity is limited by the capacitive crosstalk and signal reflection can lead to notch attack in some frequency bands. In this paper, two new bus coding schemes are proposed to improve signal integrity, reducing the crosstalk to increase bandwidth for on-silicon-interposer and on-glass-interposer inter-chip data communications. For silicon interposer, a joint code division multiple access and crosstalk avoidance coding (Joint CDMA/CAC) scheme is proposed to reduce the capacitive crosstalk effect for fine-pitch interconnects. The eye diagram and bit error rate are both improved, and the average crosstalk effect is reduced by half. Also, a cognitive bus coding scheme is proposed by spread spectrum and channel learning for glass interposer. The proposed cognitive bus coding increases the total data bandwidth under frequency notches based on the channel condition for modulation.
AB - In the present Artificial Intelligence (AI) hardware research, interposer based multi-chip Deep Learning Accelerator (DLA) system is one of the main technology. Silicon (Si) interposer is the main key in the emerging 2.5D integration process. However, signal integrity is limited by the capacitive crosstalk and signal reflection can lead to notch attack in some frequency bands. In this paper, two new bus coding schemes are proposed to improve signal integrity, reducing the crosstalk to increase bandwidth for on-silicon-interposer and on-glass-interposer inter-chip data communications. For silicon interposer, a joint code division multiple access and crosstalk avoidance coding (Joint CDMA/CAC) scheme is proposed to reduce the capacitive crosstalk effect for fine-pitch interconnects. The eye diagram and bit error rate are both improved, and the average crosstalk effect is reduced by half. Also, a cognitive bus coding scheme is proposed by spread spectrum and channel learning for glass interposer. The proposed cognitive bus coding increases the total data bandwidth under frequency notches based on the channel condition for modulation.
KW - Bus-Coding
KW - Crosstalk
KW - Interconnect
KW - Interposer
UR - http://www.scopus.com/inward/record.url?scp=85147423878&partnerID=8YFLogxK
U2 - 10.1109/MCSoC57363.2022.00044
DO - 10.1109/MCSoC57363.2022.00044
M3 - Conference contribution
AN - SCOPUS:85147423878
T3 - Proceedings - 2022 IEEE 15th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2022
SP - 232
EP - 238
BT - Proceedings - 2022 IEEE 15th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2022
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 15th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2022
Y2 - 19 December 2022 through 22 December 2022
ER -