CMOS low-noise amplifier with shunt-peaking load for group 1-3 MB-OFDM ultra-wideband wireless receiver

Zhe Yang Huang*, Che Cheng Huang, Chun Chieh Chen, Chung-Chih Hung, Christina F. Jou

*此作品的通信作者

研究成果: Conference contribution同行評審

2 引文 斯高帕斯(Scopus)

摘要

In this paper, a CMOS low-noise amplifier (LNA) is designed for ultra-wideband (UWB) wireless receiver system. The design consists of a wideband input impedance matching network, two stage cascode amplifiers with shunt-peaking load and an output buffer for measurement purpose. It was fabricated in UMC 0.18um standard RF CMOS process. The LNA provides 14.1dB maximum power gain between 2.3GHz-8.0GH while consuming 18.6mW (including buffer) through a 1.8V supply. Over the 3.1GHz-8.0GHz frequency band, a minimum noise figure is 2.0dB. The input return loss is lower than - 7.1dB in the entire bandwidth has also been achieved.

原文English
主出版物標題2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT
發行者IEEE
頁面251-254
頁數4
ISBN(列印)978-1-4244-1616-5
DOIs
出版狀態Published - 5 9月 2008
事件2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT - Hsinchu, Taiwan
持續時間: 23 4月 200825 4月 2008

出版系列

名字2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT

Conference

Conference2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT
國家/地區Taiwan
城市Hsinchu
期間23/04/0825/04/08

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