CMOS implementation of neural networks for speech recognition

I. Chang Jou*, Ron Yi Liu, Chung-Yu Wu

*此作品的通信作者

研究成果: Paper同行評審

3 引文 斯高帕斯(Scopus)

摘要

In this paper, a Spatiotemporal Probabilistic Neural Network (SPNN) is proposed for spatiotemporal pattern recognition. This new model is developed by applying the concept of Gaussian density function to the network structure of the SPR (Spatiotemporal Pattern Recognition). The main advantages of this new model include faster training and recalling process for patterns, and the overall architecture is also simple, modular, regular, locally connected for VLSI implementation. The CMOS current-mode IC technology is used to implement the SPNN to achieve the objective of minimum classification error in a more direct manner. In this design, neural computation is performed in analog circuits while template information is stored in digital circuits. One set of independent speaker isolated (Mandarin digit) speech database is used as an example to demonstrate the superiority of the neural networks for spatiotemporal pattern recognition.

原文English
頁面513-518
頁數6
出版狀態Published - 1 十二月 1994
事件Proceedings of the 1994 IEEE Asia-Pacific Conference on Circuits and Systems - Taipei, Taiwan
持續時間: 5 十二月 19948 十二月 1994

Conference

ConferenceProceedings of the 1994 IEEE Asia-Pacific Conference on Circuits and Systems
城市Taipei, Taiwan
期間5/12/948/12/94

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