CMOS-Compatible Fabrication of Low-Power Ferroelectric Tunnel Junction for Neural Network Applications

Yi Shan Kuo, Shen Yang Lee, Chia Chin Lee, Shou Wei Li, Tien-Sheng Chao*

*此作品的通信作者

研究成果: Article同行評審

4 引文 斯高帕斯(Scopus)

摘要

A low-cost fabrication process of Hf -{{1}-{x}} ZrxO2 (HZO) nonvolatile memory (NVM) was proposed and its characteristics were investigated. We successfully fabricated a ferroelectric tunnel junction (FTJ) device with tunable conductance for neural network applications. The proposed FTJ device exhibits excellent performances, such as large conductance ratio of 40 for a 500-ns pulse and thus satisfied low-power consumption of write pulse (1 fJ per bit) and fast write speed (<500 ns) requirements. Furthermore, we revealed that the metal-ferroelectric-insulator-semiconductor structure had a higher tunneling electroresistance ratio than the metal-ferroelectric-insulator-metal structure. Moreover, the polarization operation of our FTJ devices achieved low-power analog-like conductance transition, multilevel operation, and even endurance characteristics is promising. These results demonstrate that the FTJ has high potential to be an ideal emerging memory for neuromorphic computing. Therefore, HZO-based devices are promising materials in neural network applications for next-generation devices.

原文English
文章編號9316796
頁(從 - 到)879-884
頁數6
期刊IEEE Transactions on Electron Devices
68
發行號2
DOIs
出版狀態Published - 2月 2021

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