Close Drain-Source Self-Aligned High Electron Mobility Transistors

N. H. Sheng; Mau-Chung Chang; C. P. Lee; D. L. Miller; R. T. Chen

doi:10.1109/EDL.1986.26275

Close Drain-Source Self-Aligned High Electron Mobility Transistors

N. H. Sheng, Mau-Chung Chang, C. P. Lee, D. L. Miller, R. T. Chen

研究成果: Article › 同行評審

2 引文斯高帕斯（Scopus）

摘要

A new self-aligned process for high-electron mobility transistors has been developed. This process uses a photoresist dummy gate to self-align the ohmic contacts. The resulting structure has very closely spaced source and drain. For 1-μm gate transistors, device transconductances as high as 320 ms/mm have been achieved at room temperature.

原文	English
頁（從 - 到）	11-12
頁數	2
期刊	IEEE Electron Device Letters
卷	7
發行號	1
DOIs	https://doi.org/10.1109/EDL.1986.26275
出版狀態	Published - 1 1月 1986

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10.1109/EDL.1986.26275

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abstract = "A new self-aligned process for high-electron mobility transistors has been developed. This process uses a photoresist dummy gate to self-align the ohmic contacts. The resulting structure has very closely spaced source and drain. For 1-μm gate transistors, device transconductances as high as 320 ms/mm have been achieved at room temperature.",

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Close Drain-Source Self-Aligned High Electron Mobility Transistors

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