CIMR-V: An End-to-End SRAM-based CIM Accelerator with RISC-V for AI Edge Device
- Yan Cheng Guo*
- , Tian Sheuan Chang
- , Chih Sheng Lin
- , Bo Cheng Chiou
- , Chih Ming Lai
- , Shyh Shyuan Sheu
- , Wei Chung Lo
- , Shih Chieh Chang
*此作品的通信作者
研究成果: Conference contribution › 同行評審
2
引文
斯高帕斯(Scopus)