TY - GEN
T1 - ChiYun compact
T2 - 2005 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2005
AU - Chao, Chia-Tso
AU - Wang, Seongmoon
AU - Chakradhar, Srimat T.
AU - Cheng, Kwang Ting
PY - 2005
Y1 - 2005
N2 - This paper proposes a response compactor, named ChiYun compactor, to compact scan-out responses in the presence of unknown values. By adding storage elements into an Xor network, a ChiYun compactor can offer multiple chances for a scan-out response to be observed at ATE channels in one to several scan-shift cycles. We also develop a mathematical analysis to predict the percent-age of scan-out responses masked by the unknown values for the ChiYun compactor. With this analysis, we can derive the optimal, configuration of a ChiYun compactor for minimizing the masking of scan-out responses. We further propose a selection scheme for the ChiYun compactor to selectively observe partial Xor results for improving the fault coverage. The experimental results demonstrate the effectiveness of the proposed mathematical analysis and the selection scheme. We also demonstrate that the unknown tolerance of a ChiYun compactor is higher than that of a state-of-the-art response compactor proposed in [11].
AB - This paper proposes a response compactor, named ChiYun compactor, to compact scan-out responses in the presence of unknown values. By adding storage elements into an Xor network, a ChiYun compactor can offer multiple chances for a scan-out response to be observed at ATE channels in one to several scan-shift cycles. We also develop a mathematical analysis to predict the percent-age of scan-out responses masked by the unknown values for the ChiYun compactor. With this analysis, we can derive the optimal, configuration of a ChiYun compactor for minimizing the masking of scan-out responses. We further propose a selection scheme for the ChiYun compactor to selectively observe partial Xor results for improving the fault coverage. The experimental results demonstrate the effectiveness of the proposed mathematical analysis and the selection scheme. We also demonstrate that the unknown tolerance of a ChiYun compactor is higher than that of a state-of-the-art response compactor proposed in [11].
UR - http://www.scopus.com/inward/record.url?scp=33748520555&partnerID=8YFLogxK
U2 - 10.1109/ICCD.2005.38
DO - 10.1109/ICCD.2005.38
M3 - Conference contribution
AN - SCOPUS:33748520555
SN - 0769524516
SN - 9780769524511
T3 - Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
SP - 147
EP - 152
BT - Proceedings - 2005 IEEE International Conference on Computer Design
Y2 - 2 October 2005 through 5 October 2005
ER -