Chip-level and board-level CDM ESD tests on IC products

Ming-Dou Ker*, Chih Kuo Huang, Yuan Wen Hsiao, Yong Fen Hsieh

*此作品的通信作者

    研究成果: Conference contribution同行評審

    1 引文 斯高帕斯(Scopus)

    摘要

    The electrostatic discharge (ESD) transient currents and failure analysis (FA) between chip-level and board-level charged-device-model (CDM) ESD tests are investigated in this work. The discharging current waveforms of three different printed circuit boards (PCBs) are characterized first. Then, the chip-level and board-level CDM ESD tests are performed to an ESD-protected dummy NMOS and a high-speed receiver front-end circuit, respectively. Scanning electron microscope (SEM) failure pictures show that the board-level CDM ESD test causes much severer failure than that caused by the chip-level CDM ESD test.

    原文English
    主出版物標題Proceedings of the 2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2009
    頁面45-49
    頁數5
    DOIs
    出版狀態Published - 16 11月 2009
    事件2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2009 - Suzhou, China
    持續時間: 6 7月 200910 7月 2009

    出版系列

    名字Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA

    Conference

    Conference2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2009
    國家/地區China
    城市Suzhou
    期間6/07/0910/07/09

    指紋

    深入研究「Chip-level and board-level CDM ESD tests on IC products」主題。共同形成了獨特的指紋。

    引用此