In this paper, flash memories using low temperature poly-Si thin-film transistors (LTPS-TFTs) with oxide-nitride-oxide (ONO) stack structure on glass was studied and fabricated. The surface roughness Rms of poly-Si implemented in this work is less than 20Å. For 10 ms program/erase (P/E) pulse time, the threshold voltage window of memory is 1.5V and it maintains a wide threshold voltage window after 104 P/E cycles.
|頁（從 - 到）||1152-1155|
|期刊||Digest of Technical Papers - SID International Symposium|
|出版狀態||Published - 5月 2005|
|事件||2005 SID International Symposium - Boston, MA, United States|
持續時間: 25 5月 2005 → 27 5月 2005