Different electrostatic discharge (ESD) devices in a 0.35-μm silicon germanium (SiGe) RF BiCMOS process are characterized in detail by transmission line pulse (TLP) generator and ESD simulator for on-chip BSD protection design. The test structures of diodes with different p-n junctions and the silicon-germanium heterojunction bipolar transistors (HBTs) with different layout parameters have been drawn for investigating their ESD robustness. The human-body-model (HBM) ESD robustness of SiGe HBTs with the optional low-voltage (LV), Hgh-voltage (HV), and high-speed (HS) implantations has been measured and compared in the experimental test chips.
|出版狀態||Published - 3月 2004|
|事件||Proceedings of the 2004 International Conference on Microelectronic Test Structures (ICMTS 2004) - Awaji, Japan|
持續時間: 22 3月 2004 → 25 3月 2004
|Conference||Proceedings of the 2004 International Conference on Microelectronic Test Structures (ICMTS 2004)|
|期間||22/03/04 → 25/03/04|