Characteristics of Stacked Gate-All-Around Si Nanosheet MOSFETs with Metal Sidewall Source/Drain and Their Impacts on CMOS Circuit Properties

Wen Li Sung, Yiming Li*

*此作品的通信作者

研究成果: Article同行評審

24 引文 斯高帕斯(Scopus)

摘要

In this brief, we computationally examine electrical characteristics of stacked gate-all-around Si nanosheet MOSFETs (GAA NS-FETs) with and without metal sidewall (MSW) source/drain (S/D) by increasing the number of channels (NCs) and their impacts on digital circuits. The ON-current ( ${I}_{ \mathrm{\scriptscriptstyle ON}}$ ) and circuit performances of the NS-FETs without the MSW S/D are limited to three channels due to the electrostatic potential decreasing from the top contacts to the bottom S/D side of NS-FETs; however, the MSW S/D can improve the ${I}_{\text {on}}$ with increasing the NCs over three channels because of low resistivity of tungsten ( $5.6\times 10^{-{6}}\,\, \Omega \cdot \text {cm}$ ) in the sidewall of S/D and then the circuit performances can be boost by the MSW S/D structure of the stacked GAA NS-FETs over three channels. For example, up to six channels of the NS-FETs with the MSW S/D, the frequency of ring oscillator is 57% increase, compared with the case without MSW S/D. The results of this study can be considered to design the S/D structure of the stacked GAA NS-FETs in emerging device technologies.

原文English
文章編號9424147
頁(從 - 到)3124-3128
頁數5
期刊IEEE Transactions on Electron Devices
68
發行號6
DOIs
出版狀態Published - 6月 2021

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