Characteristics of gate-all-around silicon nanowire and nanosheet MOSFETs with various spacers

Sekhar Reddy Kola, Yiming Li-*, Narasimhulu Thoti

*此作品的通信作者

研究成果: Conference contribution同行評審

18 引文 斯高帕斯(Scopus)

摘要

We estimate DC characteristics and single-charge trap (SCT) induced random telegraph noise (RTN) of gate-all-around (GAA) silicon nanowire (NW) and nanosheet (NS) metal-oxide-semiconductor field effect transistor (MOSFETs) for sub-5-nm nodes. Devices with various dielectric spacers from low- to high-κ including asymmetric dual spacers (ADS) are considered. More than 31% boost on the normalized on-state currents is observed for the explored devices with high-κ and ADS spacers. Similarly, for the normalized off-state currents, more than 50% reduction is achieved. The largest magnitude of the RTN (ΔID/ID×100%) is 6.7% for the nominal GAA Si NS MOSFET with an effective channel width of 40-nm.

原文English
主出版物標題2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020
發行者Institute of Electrical and Electronics Engineers Inc.
頁面79-82
頁數4
ISBN(電子)9784863487635
DOIs
出版狀態Published - 23 9月 2020
事件2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020 - Virtual, Kobe, Japan
持續時間: 3 9月 20206 10月 2020

出版系列

名字International Conference on Simulation of Semiconductor Processes and Devices, SISPAD
2020-September

Conference

Conference2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020
國家/地區Japan
城市Virtual, Kobe
期間3/09/206/10/20

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