Challenges and opportunities toward online training acceleration using RRAM-based hardware neural network

Chih Cheng Chang, Jen Chieh Liu, Yu Lin Shen, Teyuh Chou, Pin Chun Chen, I. Ting Wang, Chih Chun Su, Ming Hong Wu, Boris Hudec, Che Chia Chang, Chia-Ming Tsai, Tian-Sheuan Chang, H. S.Philip Wong, Tuo-Hung Hou

研究成果: Conference contribution同行評審

17 引文 斯高帕斯(Scopus)

摘要

This paper highlights the feasible routes of using resistive memory (RRAM) for accelerating online training of deep neural networks (DNNs). A high degree of asymmetric nordinearity in analog RRAMs could be tolerated when weight update algorithms are optimized with reduced training noise. Hybrid-weight Net (HW-Net), a modified multilayer perceptron (MLP) algorithm that utilizes hybrid internal analog and external binary weights is also proposed. Highly accurate online training could be realized using simple binary RRAMs that have already been widely developed as digital memory.

原文English
主出版物標題2017 IEEE International Electron Devices Meeting, IEDM 2017
發行者Institute of Electrical and Electronics Engineers Inc.
頁面11.6.1-11.6.4
頁數4
ISBN(電子)9781538635599
DOIs
出版狀態Published - 23 1月 2018
事件63rd IEEE International Electron Devices Meeting, IEDM 2017 - San Francisco, United States
持續時間: 2 12月 20176 12月 2017

出版系列

名字Technical Digest - International Electron Devices Meeting, IEDM
ISSN(列印)0163-1918

Conference

Conference63rd IEEE International Electron Devices Meeting, IEDM 2017
國家/地區United States
城市San Francisco
期間2/12/176/12/17

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