Challenges and opportunities toward online training acceleration using RRAM-based hardware neural network

Chih Cheng Chang; Jen Chieh Liu; Yu Lin Shen; Teyuh Chou; Pin Chun Chen; I. Ting Wang; Chih Chun Su; Ming Hong Wu; Boris Hudec; Che Chia Chang; Chia-Ming Tsai; Tian-Sheuan Chang; H. S.Philip Wong; Tuo-Hung Hou

doi:10.1109/IEDM.2017.8268373

Challenges and opportunities toward online training acceleration using RRAM-based hardware neural network

Chih Cheng Chang, Jen Chieh Liu, Yu Lin Shen, Teyuh Chou, Pin Chun Chen, I. Ting Wang, Chih Chun Su, Ming Hong Wu, Boris Hudec, Che Chia Chang, Chia-Ming Tsai, Tian-Sheuan Chang, H. S.Philip Wong, Tuo-Hung Hou

研究成果: Conference contribution › 同行評審

18 引文斯高帕斯（Scopus）

摘要

This paper highlights the feasible routes of using resistive memory (RRAM) for accelerating online training of deep neural networks (DNNs). A high degree of asymmetric nordinearity in analog RRAMs could be tolerated when weight update algorithms are optimized with reduced training noise. Hybrid-weight Net (HW-Net), a modified multilayer perceptron (MLP) algorithm that utilizes hybrid internal analog and external binary weights is also proposed. Highly accurate online training could be realized using simple binary RRAMs that have already been widely developed as digital memory.

原文	English
主出版物標題	2017 IEEE International Electron Devices Meeting, IEDM 2017
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	11.6.1-11.6.4
頁數	4
ISBN（電子）	9781538635599
DOIs	https://doi.org/10.1109/IEDM.2017.8268373
出版狀態	Published - 23 1月 2018
事件	63rd IEEE International Electron Devices Meeting, IEDM 2017 - San Francisco, United States 持續時間: 2 12月 2017 → 6 12月 2017

出版系列

名字	Technical Digest - International Electron Devices Meeting, IEDM
ISSN（列印）	0163-1918

Conference

Conference	63rd IEEE International Electron Devices Meeting, IEDM 2017
國家/地區	United States
城市	San Francisco
期間	2/12/17 → 6/12/17

存取文件

10.1109/IEDM.2017.8268373

其它文件與鏈接

Link to publication in Scopus

引用此

Chang, C. C., Liu, J. C., Shen, Y. L., Chou, T., Chen, P. C., Wang, I. T., Su, C. C., Wu, M. H., Hudec, B., Chang, C. C., Tsai, C-M., Chang, T-S., Wong, H. S. P., & Hou, T-H. (2018). Challenges and opportunities toward online training acceleration using RRAM-based hardware neural network. 於 2017 IEEE International Electron Devices Meeting, IEDM 2017 (頁 11.6.1-11.6.4). (Technical Digest - International Electron Devices Meeting, IEDM). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IEDM.2017.8268373

Chang, Chih Cheng ; Liu, Jen Chieh ; Shen, Yu Lin 等. / Challenges and opportunities toward online training acceleration using RRAM-based hardware neural network. 2017 IEEE International Electron Devices Meeting, IEDM 2017. Institute of Electrical and Electronics Engineers Inc., 2018. 頁 11.6.1-11.6.4 (Technical Digest - International Electron Devices Meeting, IEDM).

@inproceedings{e9f9ac58be794c3f9ff61fd21272921f,

title = "Challenges and opportunities toward online training acceleration using RRAM-based hardware neural network",

abstract = "This paper highlights the feasible routes of using resistive memory (RRAM) for accelerating online training of deep neural networks (DNNs). A high degree of asymmetric nordinearity in analog RRAMs could be tolerated when weight update algorithms are optimized with reduced training noise. Hybrid-weight Net (HW-Net), a modified multilayer perceptron (MLP) algorithm that utilizes hybrid internal analog and external binary weights is also proposed. Highly accurate online training could be realized using simple binary RRAMs that have already been widely developed as digital memory.",

author = "Chang, {Chih Cheng} and Liu, {Jen Chieh} and Shen, {Yu Lin} and Teyuh Chou and Chen, {Pin Chun} and Wang, {I. Ting} and Su, {Chih Chun} and Wu, {Ming Hong} and Boris Hudec and Chang, {Che Chia} and Chia-Ming Tsai and Tian-Sheuan Chang and Wong, {H. S.Philip} and Tuo-Hung Hou",

year = "2018",

month = jan,

day = "23",

doi = "10.1109/IEDM.2017.8268373",

language = "English",

series = "Technical Digest - International Electron Devices Meeting, IEDM",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "11.6.1--11.6.4",

booktitle = "2017 IEEE International Electron Devices Meeting, IEDM 2017",

address = "United States",

note = "null ; Conference date: 02-12-2017 Through 06-12-2017",

}

Chang, CC, Liu, JC, Shen, YL, Chou, T, Chen, PC, Wang, IT, Su, CC, Wu, MH, Hudec, B, Chang, CC, Tsai, C-M , Chang, T-S, Wong, HSP & Hou, T-H 2018, Challenges and opportunities toward online training acceleration using RRAM-based hardware neural network. 於 2017 IEEE International Electron Devices Meeting, IEDM 2017. Technical Digest - International Electron Devices Meeting, IEDM, Institute of Electrical and Electronics Engineers Inc., 頁 11.6.1-11.6.4, 63rd IEEE International Electron Devices Meeting, IEDM 2017, San Francisco, United States, 2/12/17. https://doi.org/10.1109/IEDM.2017.8268373

Challenges and opportunities toward online training acceleration using RRAM-based hardware neural network. / Chang, Chih Cheng; Liu, Jen Chieh; Shen, Yu Lin 等.

2017 IEEE International Electron Devices Meeting, IEDM 2017. Institute of Electrical and Electronics Engineers Inc., 2018. p. 11.6.1-11.6.4 (Technical Digest - International Electron Devices Meeting, IEDM).

研究成果: Conference contribution › 同行評審

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T1 - Challenges and opportunities toward online training acceleration using RRAM-based hardware neural network

AU - Chang, Chih Cheng

AU - Liu, Jen Chieh

AU - Shen, Yu Lin

AU - Chou, Teyuh

AU - Chen, Pin Chun

AU - Wang, I. Ting

AU - Su, Chih Chun

AU - Wu, Ming Hong

AU - Hudec, Boris

AU - Chang, Che Chia

AU - Tsai, Chia-Ming

AU - Chang, Tian-Sheuan

AU - Wong, H. S.Philip

AU - Hou, Tuo-Hung

PY - 2018/1/23

Y1 - 2018/1/23

N2 - This paper highlights the feasible routes of using resistive memory (RRAM) for accelerating online training of deep neural networks (DNNs). A high degree of asymmetric nordinearity in analog RRAMs could be tolerated when weight update algorithms are optimized with reduced training noise. Hybrid-weight Net (HW-Net), a modified multilayer perceptron (MLP) algorithm that utilizes hybrid internal analog and external binary weights is also proposed. Highly accurate online training could be realized using simple binary RRAMs that have already been widely developed as digital memory.

AB - This paper highlights the feasible routes of using resistive memory (RRAM) for accelerating online training of deep neural networks (DNNs). A high degree of asymmetric nordinearity in analog RRAMs could be tolerated when weight update algorithms are optimized with reduced training noise. Hybrid-weight Net (HW-Net), a modified multilayer perceptron (MLP) algorithm that utilizes hybrid internal analog and external binary weights is also proposed. Highly accurate online training could be realized using simple binary RRAMs that have already been widely developed as digital memory.

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T3 - Technical Digest - International Electron Devices Meeting, IEDM

SP - 11.6.1-11.6.4

BT - 2017 IEEE International Electron Devices Meeting, IEDM 2017

PB - Institute of Electrical and Electronics Engineers Inc.

Y2 - 2 December 2017 through 6 December 2017

ER -

Chang CC, Liu JC, Shen YL, Chou T, Chen PC, Wang IT 等. Challenges and opportunities toward online training acceleration using RRAM-based hardware neural network. 於 2017 IEEE International Electron Devices Meeting, IEDM 2017. Institute of Electrical and Electronics Engineers Inc. 2018. p. 11.6.1-11.6.4. (Technical Digest - International Electron Devices Meeting, IEDM). doi: 10.1109/IEDM.2017.8268373

Challenges and opportunities toward online training acceleration using RRAM-based hardware neural network

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