Challenges and designs of TFET for digital applications

This chapter reviews the challenges and designs of digital TFET circuits. Several fundamental features of TFET such as unidirectional conduction, delayed saturation, and enhanced Miller capacitance are described with emphasis on their impacts on the functionality and robustness of logic and SRAM circuits. For TFET logic circuits, structural innovations and device design are demonstrated to facilitate compact circuit design and performance improvement. For SRAM, the advantages of hybrid TFET-MOSFET 8T SRAM cell in stability and efficiency of WRITE-assisted circuit to enhance performance are addressed. Moreover, the variability and backgate bias technique for TFET digital circuit design are highlighted.