TY - JOUR
T1 - CAPACITANCE MEASUREMENT TECHNIQUE IN HIGH DENSITY MOS STRUCTURES.
AU - Iwai, Hiroshi
AU - Kohyama, Susumu
PY - 1980
Y1 - 1980
N2 - A precise capacitance measurement technique is described. This technique is based on a principle of capacitively divided ac voltage measurement. In test devices, reference and test capacitors are connected in series, and intermediate node signal is monitored by on chip linear sense amplifier. Utilizing the technique, various capacitances were measured, and quantitative compared with a two dimensional numerical analysis. The results indicate that the technique is practical and accurate for evaluating capacitive elements in VLSI's.
AB - A precise capacitance measurement technique is described. This technique is based on a principle of capacitively divided ac voltage measurement. In test devices, reference and test capacitors are connected in series, and intermediate node signal is monitored by on chip linear sense amplifier. Utilizing the technique, various capacitances were measured, and quantitative compared with a two dimensional numerical analysis. The results indicate that the technique is practical and accurate for evaluating capacitive elements in VLSI's.
UR - http://www.scopus.com/inward/record.url?scp=0019245348&partnerID=8YFLogxK
U2 - 10.1109/iedm.1980.189802
DO - 10.1109/iedm.1980.189802
M3 - Conference article
AN - SCOPUS:0019245348
SP - 235
EP - 238
JO - Technical Digest - International Electron Devices Meeting
JF - Technical Digest - International Electron Devices Meeting
SN - 0163-1918
Y2 - 8 December 1980 through 10 December 1980
ER -