A precise capacitance measurement technique is described. This technique is based on a principle of capacitively divided ac voltage measurement. In test devices, reference and test capacitors are connected in series, and intermediate node signal is monitored by on chip linear sense amplifier. Utilizing the technique, various capacitances were measured, and quantitative compared with a two dimensional numerical analysis. The results indicate that the technique is practical and accurate for evaluating capacitive elements in VLSI's.
|頁（從 - 到）||235-238|
|期刊||Technical Digest - International Electron Devices Meeting|
|出版狀態||Published - 1980|
|事件||Tech Dig Int Electron Devices Meet - Washington, DC, USA|
持續時間: 8 12月 1980 → 10 12月 1980