CAPACITANCE MEASUREMENT TECHNIQUE IN HIGH DENSITY MOS STRUCTURES.

Hiroshi Iwai*, Susumu Kohyama

*此作品的通信作者

研究成果: Conference article同行評審

9 引文 斯高帕斯(Scopus)

摘要

A precise capacitance measurement technique is described. This technique is based on a principle of capacitively divided ac voltage measurement. In test devices, reference and test capacitors are connected in series, and intermediate node signal is monitored by on chip linear sense amplifier. Utilizing the technique, various capacitances were measured, and quantitative compared with a two dimensional numerical analysis. The results indicate that the technique is practical and accurate for evaluating capacitive elements in VLSI's.

原文English
頁(從 - 到)235-238
頁數4
期刊Technical Digest - International Electron Devices Meeting
DOIs
出版狀態Published - 1980
事件Tech Dig Int Electron Devices Meet - Washington, DC, USA
持續時間: 8 12月 198010 12月 1980

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