摘要
In this work, we report that the VTH stability in p-GaN power HEMTs under a high dVg/dt event is highly correlated with the capacitance for the first time. The different dVg/dt event is performed by using fast sweep characterization with sweeping time (tsweep) varied from 10ms to 25∼\μ s. As the tsweep is decreased, i.e., high dVg/dt, p-GaN HEMTs show a negative VTH shift and a high measured gate current. The higher measured gate current is mainly due to the displacement current with respect to a high dVg/dt. To further understand the impacts of capacitance on VTH stability, p-GaN power HEMTs are connected with different additional capacitance (Cadditional) between gate-to-source terminals. The results indicate that the negative VTH shift and the gate current are highly correlated with the Cadditional, i.e., a large negative VTH shift and a high measured gate current in the device with a large Cadditional, suggesting that the charging capacitance caused by the displacement current during a high dVg/dt event can influence the VTHstability. Therefore, the optimization of the capacitance is crucial to improve the VTH stability during a high-speed gate operation.
原文 | English |
---|---|
頁(從 - 到) | 1617-1620 |
頁數 | 4 |
期刊 | Ieee Electron Device Letters |
卷 | 43 |
發行號 | 10 |
DOIs | |
出版狀態 | Published - 1 10月 2022 |