TY - GEN
T1 - BSIM-BULK
T2 - 40th Annual IEEE Custom Integrated Circuits Conference, CICC 2019
AU - Gupta, Chetan
AU - Goel, Ravi
AU - Agarwal, Harshit
AU - Hu, Chen-Ming
AU - Chauhan, Yogesh Singh
PY - 2019/4/1
Y1 - 2019/4/1
N2 - In this work, we present the recent and upcoming enhancements of the industry standard BSIM-BULK (formerly BSIM6) model. BSIM-BULK is the latest body referenced compact model for bulk MOSFETs having a unified core, which is developed by the BSIM group for accurate design of analog and RF circuits. The model satisfies the symmetry test for DC and AC, correctly predicts harmonic slope, and exhibits accurate results for RF and analog simulations. In order to further improve the model accuracy for transconductance (gm) and output conductance (gds), an analytical model for bulk charge effect, in both current and capacitance, is implemented. Several other advanced models are added to capture real device physics. These include: parasitic current at the shallow trench isolation edges; leakage current components in zero threshold voltage native devices; new model for NQS to capture the NQS effects up to the millimeter wave regime; self heating effect; and heavily halo implanted MOSFET's anomalous gm, flicker noise and IDS mismatch. All these enhancements have been implemented to high standards of computational efficiency and robustness.
AB - In this work, we present the recent and upcoming enhancements of the industry standard BSIM-BULK (formerly BSIM6) model. BSIM-BULK is the latest body referenced compact model for bulk MOSFETs having a unified core, which is developed by the BSIM group for accurate design of analog and RF circuits. The model satisfies the symmetry test for DC and AC, correctly predicts harmonic slope, and exhibits accurate results for RF and analog simulations. In order to further improve the model accuracy for transconductance (gm) and output conductance (gds), an analytical model for bulk charge effect, in both current and capacitance, is implemented. Several other advanced models are added to capture real device physics. These include: parasitic current at the shallow trench isolation edges; leakage current components in zero threshold voltage native devices; new model for NQS to capture the NQS effects up to the millimeter wave regime; self heating effect; and heavily halo implanted MOSFET's anomalous gm, flicker noise and IDS mismatch. All these enhancements have been implemented to high standards of computational efficiency and robustness.
UR - https://www.scopus.com/pages/publications/85070542236
U2 - 10.1109/CICC.2019.8780155
DO - 10.1109/CICC.2019.8780155
M3 - Conference contribution
AN - SCOPUS:85070542236
T3 - Proceedings of the Custom Integrated Circuits Conference
BT - 2019 IEEE Custom Integrated Circuits Conference, CICC 2019
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 14 April 2019 through 17 April 2019
ER -