Board level ESD of driver ICs on LCD panels

C. T. Hsu*, J. C. Tseng, Y. L. Chen, F. Y. Tsai, S. H. Yu, P. A. Chen, Ming-Dou Ker

*此作品的通信作者

    研究成果: Conference contribution同行評審

    4 引文 斯高帕斯(Scopus)

    摘要

    A method utilizing Charged Device Model (CDM) discharging to emulate real-world Charged Board Model (CBM) discharging was proposed and successfully addressed the weakest spot of whole chip. In order to extract the correlation between CDM pre-fail voltage VCDM and CBM pre-fail voltage V CBM, the capacitance and discharging waveforms of output pin on an IC and Printed Circuit Board (PCB) were measured. The results showed that the CBM evaluation board (EB) was not a must for large-size chip, as LCD driver ICs. CDM discharging can be used to direct investigate the weak point of design/layout for large-size chip. Besides, this paper addresses the guidelines about chip-level ESD cell design and layout optimization against CBM ESD damage.

    原文English
    主出版物標題2007 IEEE International Reliability Physics Symposium Proceedings, 45th Annual
    頁面590-591
    頁數2
    DOIs
    出版狀態Published - 25 9月 2007
    事件45th Annual IEEE International Reliability Physics Symposium 2007, IRPS - Phoenix, AZ, United States
    持續時間: 15 4月 200719 4月 2007

    出版系列

    名字Annual Proceedings - Reliability Physics (Symposium)
    ISSN(列印)0099-9512

    Conference

    Conference45th Annual IEEE International Reliability Physics Symposium 2007, IRPS
    國家/地區United States
    城市Phoenix, AZ
    期間15/04/0719/04/07

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